Enhancement of Electrical Safe Operation Area of 60 V nLDMOS by Engineering of Reduced Surface Electrical Field in the Drift Region

Abstract

To enhance the electrical safe operation area (eSOA) of laterally diffused metal oxide semiconductor (LDMOS) transistors, a novel reduced surface electric field (Resurf) structure in the n-drift region is proposed, which was fabricated by ion implantation at the surface of the LDMOS drift region and by drift region dimension optimization. Technology computer-aided design (TCAD) simulations show that the optimal value of Resurf ion implantation dose 1 × 1012 cm−2 can reduce the surface electric field in the n-drift region effectively, thereby improving the ON-state breakdown voltage of the device (BVon). In addition, the extended n-drift region length of the Ld design also improves device BVon significantly, and is aimed at reducing the current density and the electric field, and eventually suppressing the n-drift region impact ionization. The results show that the novel 60 V nLDMOS has a competitive BVon performance of 106.9 V, which is about 20% higher than that of the conventional one. Meanwhile, the OFF-state breakdown voltage of the device (BVoff) of 88.4 V and the specific ON-resistance (RON,sp) of 129.7 mΩ⋅mm2 exhibit only a slight sacrifice.