Enhanced Signal Processing Through FPGA-Based Digital Downconversion via the CORDIC Algorithm

Abstract

To address the rate matching issue between high-bandwidth and high-sampling-rate analog-to-digital converters (ADCs) and low-bandwidth and low-sampling-rate baseband processors, the key technology of digital downconversion is introduced. This approach relocates the intermediate-frequency baseband signal to a vicinity of the baseband, laying a foundation for subsequent Digital Signal Processor (DSP) analysis and processing. In an innovative application of the Coordinate Rotation Digital Computer (CORDIC) algorithm for Numerically Controlled Oscillator (NCO) in a pipeline design, the phase differences of five parallel signals are measured, facilitating real-time parallel processing of the phase and amplitude relationships of multiple signals. The Field Programmable Gate Array (FPGA) design and implementation of the digital mixer module and filter bank for digital downconversion have been accomplished. A test board for the direction-finding application of five digital downconversion channels has been constructed, with the FMQL45T900 as its core. The correctness of the direction-finding data has been validated through practical application, demonstrating a significant improvement in power consumption compared to methods documented in other literature, thereby enhancing overall efficiency. The digital downconversion technology based on the CORDIC algorithm is applicable in various fields, including military communications, broadcasting, and radar navigation systems.