Engineering ultra-shallow junctions using fRTP/sup TM/

Camm, D. M.; Gelpey, J.; Thrum, T.; Stuart, G.C.; Elliott, J. K.

doi:10.1109/rtp.2002.1184454

Cited by 5 publications

(3 citation statements)

References 4 publications

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“…It is clearly visible that the distribution using a simmer circuit is much narrower and more symmetric than the case without a simmer circuit. Finally, water cooling is able to reduce drifts which may arise from lamp heating if FLA is applied with a high repetition rate [59].…”

Section: Temperature Distributionsmentioning

confidence: 99%

A review of thermal processing in the subsecond range: semiconductors and beyond

Rebohle

Prucnal

Skorupa

2016

Semicond. Sci. Technol.

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Thermal processing in the subsecond range comprises modern, non-equilibrium annealing techniques which allow various material modifications at the surface without affecting the bulk. Flash lamp annealing (FLA) is one of the most diverse methods for short-time annealing with applications ranging from the classical field of semiconductor doping to the treatment of polymers and flexible substrates. It still continues to extend its use to other material classes and applications, and is becoming of interest for an increasing number of users. In this review we present a short, but comprehensive and consistent picture of the current state-of-the-art of FLA, sometimes also called pulsed light sintering. In the first part we take a closer look at the physical and technological background, namely the electrical and optical specifications of flash lamps, the resulting temperature profiles, and the corresponding implications for process-relevant parameters such as reproducibility and homogeneity. The second part briefly considers the various applications of FLA, starting with the classical task of defect minimization and ultrashallow junction formation in Si, followed by further applications in Si technology, namely in the fields of hyperdoping, crystallization of thin amorphous films, and photovoltaics. Subsequent chapters cover the topics of doping and crystallization in Ge and silicon carbide, doping of III-V semiconductors, diluted magnetic semiconductors, III-V nanocluster synthesis in Si, annealing of transparent conductive oxides and high-k materials, nanoclusters in dielectric matrices, and the use of FLA for flexible substrates.

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Section: Temperature Distributionsmentioning

confidence: 99%

A review of thermal processing in the subsecond range: semiconductors and beyond

Rebohle

Prucnal

Skorupa

2016

Semicond. Sci. Technol.

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“…More recent anneal applications require even shorter anneals, on the order of milliseconds where only the top surface is heated to a depth of a few microns and cooling is by the bulk of the wafer. These so called 'flash' anneals are being addressed by a specialized laser and flash lamp annealing systems [7,8,9].…”

Section: Rise Of Rtp -Early Process Requirementsmentioning

confidence: 99%

Evolution of Commercial RTP Modules

Peuse

2008

MSF

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Rapid Thermal Processing (RTP) has been a key technology for semiconductor manufacturing. The ability to rapidly change wafer-processing temperature in a well-controlled way is a distinguishing characteristic of RTP. Today’s state of the art single wafer RTP equipment is used for a wide range of thermal processes for the manufacturing of advanced semiconductor devices. Two different designs of halogen lamp based RTP equipment dominate the applications. The two equipment designs can be traced back to the early development of the semiconductor industry before there was wide acceptance of RTP. Two junctures in the evolutions of these designs resulted in the growth of RTP. The first juncture occurred when the conventional batch diffusion furnace could not satisfy some of the thermal budget and ambient control process requirements for semiconductor devices. A second juncture occurred with breakthrough developments in RTP equipment that enabled better control and repeatability of the process temperature. Developments of alternatives to tungsten halogen lamp based RTP will likely be seen in the future.

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“…Thus, concentrations of free interstitials may be considered to be in quasiequilibrium with those of complexes and small clusters, even under the extremely fast ramping conditions of ''flash'' rapid thermal processing, where heating rates approach 10 6 C/s. 32 There are many cluster dissociation pathways due to the varying stochiometries of larger clusters. It is therefore plausible to mathematically approximate the activation energies of those pathways using a nearly continuous distribution of dissociation energies.…”

Section: Qualitative Model Predictions For Profile Spreading and Acti...mentioning

confidence: 99%

A Simplified Picture for Transient Enhanced Diffusion of Boron in Silicon

Jung¹,

Braatz²,

Seebauer³

2004

J. Electrochem. Soc.

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In recent years, transistor junction formation in complementary metal oxide semiconductor devices by ion implantation has encountered serious limitations due to transient enhanced diffusion ͑TED͒ during the annealing step. Current models of TED rely heavily on detailed simulations of the complex diffusion-reaction network that governs TED, and often rely on fitted parameters whose values are uncertain. The present work uses a more rigorous set of rate parameters obtained from a maximum likelihood estimation to develop a relatively simple analytical treatment of boron TED that is capable of estimating the degree of profile spreading and the temperature at which TED should begin to occur significantly. The treatment suggests that reduction of TED should focus on implantation schemes and heating programs designed to decrease the number of clusters slightly smaller than the very largest.Forming extremely shallow pn junctions in Si-based microelectronic logic devices is becoming increasingly critical as device dimensions continue to diminish. For example, advanced complementary metal oxide semiconductor devices will require junction depths X j between 13 and 22 nm in the source and drain extension regions by 2005. 1 Current technology for junction formation relies almost exclusively on ion implantation to introduce dopants into the substrate. Although junction depths can be made shallower by reducing the implant energy, the effectiveness of this approach has been limited by the need to anneal the resulting structure to activate the dopant electrically and to eliminate implant-induced defects in the crystal structure. As long as they exist, these defects mediate exceptionally fast transient enhanced diffusion ͑TED͒ of the implanted dopants, often leading to significant spreading of the original dopant profile.Because experiments to measure TED kinetics are expensive and sometimes difficult to interpret unambiguously, many researchers have resorted to detailed modeling to aid process development. There have been several attempts in the literature to develop a comprehensive physical picture for TED, 2-5 and such attempts have been incorporated into various widely used profile simulators. 6 However, the existing models suffer important deficiencies.One problem is that the predictive capability of most TED models outside their tested range is subject to serious doubt. Many elementary kinetic steps contribute to the experimental observable: typically a dopant depth profile obtained by secondary ion mass spectroscopy ͑SIMS͒. Hence, all models include numerous rate parameters, many of whose values are developed primarily according to their ability to fit experimental SIMS profiles. The large number of parameters provides many degrees of freedom for fitting, impeding the ability to develop a unique set.A second problem is that profile simulators are not very conducive to developing simple, intuitive explanations for key features of TED that retain quantitative utility. Many kinetic processes take place in ways that vary strong...

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Engineering ultra-shallow junctions using fRTP/sup TM/

Cited by 5 publications

References 4 publications

A review of thermal processing in the subsecond range: semiconductors and beyond

A review of thermal processing in the subsecond range: semiconductors and beyond

Evolution of Commercial RTP Modules

A Simplified Picture for Transient Enhanced Diffusion of Boron in Silicon

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