Engineered interface using a hydroxyl group‐free polymeric buffer layer onto a TiO₂ nanocomposite film for improving the electrical properties in a low‐voltage operated organic transistor

Abstract

We demonstrate the effect of engineered interfaces by introducing different classes of polymeric buffer layers onto a titanium oxide (TiO 2 ) nanocomposite film on the density of interfacial trap sites and corresponding mobility in low-voltage-operated organic field-effect transistors. The organic field-effect transistors were fabricated using pentacene as an organic semiconductor layer and a high dielectric TiO 2 nanocomposite film for low-voltage operation stacked with two different kinds of thin polymers, one of which is hydroxyl group-existing polyvinyl phenol and the other is hydroxyl group-free polyvinyl cinnamate. By using the hydroxyl group-free buffer layer, the interfacial trap density is found to be much decreased than that for the hydroxyl groupexisting buffer layer. In addition, the mobility for the polyvinyl cinnamate used case, shows significantly increased value by at least one of magnitude compared to the case of no buffer layer. It is found that a hydroxyl group-free polymeric layer produces a more effective surface, which leads to high electrical properties and less electrochemical traps at the interface in the organic devices.

Interface engineering for high-performance organic field-effect transistors

“…Under the guidelines of this concept, other hydroxyl-free polymers, such as polyethylene, poly(methyl methacrylate) and parylene, have been used as a buffer layer and n-type properties have been observed in most OFET cases, further confirming that high performance and stable n-type OFETs can be achieved through passivating the influence of the negative factors on electron transport. 40,41,98 For example, high performance n-type poly(benzobisimidazobenzophenanthroline) (BBL) polymer thin film transistors, with excellent device stabilities, have been achieved by Kim et al, 99 through modification of the dielectric/ semiconductor interfaces with a polymer buffer layer. The authors carried out a systematic study on the effect of the polymer dielectric constant on the n-type device performance and found that the electron mobility and device stability could be significantly increased by decreasing the dielectric constant of the polymer layers due to the reduced energetic expense of the charge-carrier/dipole interaction.…”

One-Volt, Solution-Processed Organic Transistors with Self-Assembled Monolayer-Ta2O5 Gate Dielectrics

“…Such thin insulator layers result in very high leakage currents, especially in Ta 2 O 5 which has a comparatively small band gap (4.5 eV) when compared with other metal oxide dielectrics such as ZrO 2 , (7.8 eV) or Al 2 O 3 (8.9 eV). In addition, as in the case of other dielectric metal oxides, the surface hydroxyl (–OH) groups on the surface of tantalum oxide tend to create a large number of insulator/semiconductor interfacial traps which consequently imposes detrimental effects on TFT performance [17]. An effective method to passivate thin layers of metal oxide dielectrics in thin-film transistors is by making the surface considerably less polar via salinization.…”

Effects of the F4TCNQ-Doped Pentacene Interlayers on Performance Improvement of Top-Contact Pentacene-Based Organic Thin-Film Transistors

“…The sub-threshold swing ( SS ) was calculated using the equation SS = dV GS / d (log 10 | I DS | ). The maximum and minimum values of I DS at a V DS of −20 V were designated as I ON (on current) and I OFF (off current), respectively [ 19 ]. The thickness-dependent properties of pentacene-based OTFTs with Teflon and F 4 TCNQ-doped pentacene interlayers of various thicknesses were summarized in Table 1 .…”