Energy reduction techniques for multimedia applications with tolerance to deadline misses

Hua, Shaoxiong; Qu, Gang; Bhattacharyya, Shuvra S.

doi:10.1145/775832.775868

Cited by 66 publications

(26 citation statements)

References 20 publications

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“…Yuan and Nahrstedt (2003) proposed to incorporate the stochastic analysis into DVS for soft deadline systems to provide the statistic QoS guarantee. With the QoS requirements formulated as the tolerable statistic deadline missing rate, Hua et al (2003) introduced several techniques to exploit the processor slack time due to the deadline miss to reduce the energy.…”

Section: Related Workmentioning

confidence: 99%

Energy efficient scheduling for real-time embedded systems with QoS guarantee

Niu

2011

Real-Time Syst

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While the dynamic voltage scaling (DVS) techniques are efficient in reducing the dynamic energy consumption for the processor, varying voltage alone becomes less effective for the overall energy reduction as the static power is growing rapidly. On the other hand, Quality of Service (QoS) is also a primary concern in the development of today's pervasive computing systems. In this paper, we propose a dynamic approach to minimize the overall energy consumption for soft real-time systems while ensuring the QoS-guarantee. The QoS requirements are deterministically quantified with the window-constraints, which require that at least m out of each non-overlapped window of k consecutive jobs of a task meet their deadlines. Necessary and sufficient conditions for checking the feasibility of task sets with arbitrary service times and periods are developed to ensure that the window-constraints can be guaranteed in the worst case. And efficient scheduling techniques based on pattern variation and dynamic slack reclaiming extensions are proposed to combine the task procrastination and dynamic slowdown to minimize the energy consumption. In contrast to the previous leakage-aware dynamic reclaiming work which never scales the job speed below the critical speed, we will show that it can be more energy efficient to reclaim the slack with speed lower than the critical speed when necessary. Through extensive simulations, our experiment results demonstrate that the proposed techniques significantly outperformed the previous research in both overall and idle energy reduction.

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Section: Related Workmentioning

confidence: 99%

Energy efficient scheduling for real-time embedded systems with QoS guarantee

Niu

2011

Real-Time Syst

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“…We propose two novel optimal algorithms, one for uniprocessor and one for multiprocessor DSP systems, to minimize the expected value of total energy consumption while satisfying timing constraints with guaranteed probabilities for real-time applications. Our work is related to the work in [9,10]. In [9,10], Hua et al proposed a heuristic algorithm for uniprocessor and the Data Flow Graph (DFG) is a simple path.…”

Section: Introductionmentioning

confidence: 98%

“…The systems become more and more complicate and some tasks may not have fixed execution time. Such tasks usually contain conditional instructions and/or operations that could have different execution times for different inputs [7][8][9][10][11]. It is possible to obtain the execution time distribution for each task by sampling and knowing detailed timing information about the system or by profiling the target hardware [12].…”

Section: Introductionmentioning

confidence: 99%

“…However, their evaluation method becomes very time consuming when task has many different execution time variations. Hua et al [9,10] propose the concept of probabilistic design where they design the system to meet the timing constraints of periodic applications statistically. But their algorithm is not optimal and only suitable to uniprocessor executing tasks according to a fixed order, that is, a simple path.…”

Section: Introductionmentioning

confidence: 99%

See 1 more Smart Citation

Voltage Assignment with Guaranteed Probability Satisfying Timing Constraint for Real-time Multiproceesor DSP

Qiu

Jia

Xue

et al. 2007

J VLSI Sign Process Syst Sign Image Video Technol

107

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Dynamic Voltage Scaling (DVS) is one of the techniques used to obtain energy-saving in real-time DSP systems. In many DSP systems, some tasks contain conditional instructions that have different execution times for different inputs. Due to the uncertainties in execution time of these tasks, this paper models each varied execution time as a probabilistic random variable and solves the Voltage Assignment with Probability (VAP) Problem. VAP problem involves finding a voltage level to be used for each node of an date flow graph (DFG) in uniprocessor and multiprocessor DSP systems. This paper proposes two optimal algorithms, one for uniprocessor and one for multiprocessor DSP systems, to minimize the expected total energy consumption while satisfying the timing constraint with a guaranteed confidence probability. The experimental results show that our approach achieves significant energy saving than previous work. For example, our algorithm for multiprocessor achieves an average improvement of 56.1% on total energy-saving with 0.80 probability satisfying timing constraint.

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“…Hua et al proposed different algorithms to scale down task voltage to reduce total energy consumption for single processor [23] and multiprocessor SoC architecture [24] by leveraging performance requirements and uncertainties in execution time with tolerance to deadline misses . In our work, we consider energy minimization for multimedia applications without tolerance to deadline misses.…”

Section: Introductionmentioning

confidence: 99%

Combining Coarse-Grained Software Pipelining with DVS for Scheduling Real-Time Periodic Dependent Tasks on Multi-Core Embedded Systems

Liu

Shao

Wang

et al. 2008

J Sign Process Syst Sign Image Video Technol

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In this paper, we combine coarse-grained software pipelining with DVS (Dynamic Voltage/Frequency Scaling) for optimizing energy consumption of streambased multimedia applications on multi-core embedded systems. By exploiting the potential of multi-core architecture and the characteristic of streaming applications, we propose a two-phase approach to solve the energy minimization problem for periodic dependent tasks on multi-core processors with discrete voltage levels. With our approach, in the first phase, we propose a coarse-grained task-level software pipelining algorithm called RDAG to transform the periodic dependent tasks into a set of independent tasks based on the retiming technique (Leiserson and Saxe, Algorithmica 6:5-35, 1991). In the second phase, we propose two DVS scheduling algorithms for energy minimization. For single-core processors, we propose a pseudo-polynomial algorithm based on dynamic programming that can achieve optimal solution. For multi-core processors, we propose a novel scheduling algorithm called SpringS which works like a spring and can effectively reduce energy consumption by iteratively adjusting task scheduling and voltage selection. We conduct experiments with a set of benchmarks from E3S (Dick 2008) and TGFF (http://ziyang.ece. northwestern.edu/tgff/) based on the power model of the AMD Mobile Athlon4 DVS processor. The experimental results show that our technique can achieve 12.7% energy saving compared with the algorithms in Zhang et al. (2002) on average.

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Energy reduction techniques for multimedia applications with tolerance to deadline misses

Cited by 66 publications

References 20 publications

Energy efficient scheduling for real-time embedded systems with QoS guarantee

Energy efficient scheduling for real-time embedded systems with QoS guarantee

Voltage Assignment with Guaranteed Probability Satisfying Timing Constraint for Real-time Multiproceesor DSP

Combining Coarse-Grained Software Pipelining with DVS for Scheduling Real-Time Periodic Dependent Tasks on Multi-Core Embedded Systems

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