Energy-Efficient Precharge-Free Ternary Content Addressable Memory (TCAM) for High Search Rate Applications

Mahendra, Telajala Venkata; Hussain, Sheikh Wasmir; Mishra, Sandeep; Dandapat, Anup

doi:10.1109/tcsi.2020.2978295

Cited by 26 publications

(5 citation statements)

References 41 publications

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“…The memory technologies and their characteristics as well as analysis are shown in Table 1 and the features associated with each one as well as the explanation of features regarding these memory technologies are denoted in Table 2. We have evaluated and surveyed the literature [5,6], and [9][10][11][12][13][14][15] the memory technologies and their features for TCAM improvement. Figure 1 shows the ANP alternatives and features.…”

Section: Problem Formulationmentioning

confidence: 99%

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An Effective Selection of Memory Technologies for TCAM to Improve the Search Operations: Demonstration of Memory Efficiency in SDN Recovery

Alahmadi,

Chung

2024

Electronics

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Ternary Content-Addressable Memory (TCAM) is used for storing the flow tables in software-defined networking (SDN)-based OpenFlow switches. However, the TCAM can store only a certain number of flow tables (8000). Moreover, when the switch flow tables need to be updated due to the link failure in the SDN, further updates may be lost due to the flow tables limit of the TCAM space. Hence, to resolve this issue, other memories need to be used in conjunction with TCAM to enhance the memory operations of TCAM. When considering which flash memory technology is to be used in conjunction with TCAM, we need to balance several factors to ensure optimal performance, speed, endurance, reliability, integration complexity, and cost-effectiveness. Hence, it leads to a multi-criteria decision-making problem regarding the selection of other memory technologies such as 3D XPoint, Magnetoresistive RAM, Resistive RAM, and Ferroelectric RAM. In this paper, we use the analytical network process (ANP) method to select the suitable technology in conjunction with TCAM, considering the features of the memory technologies for Software-Defined Internet-of-Things (SD-IoT). We provide a comprehensive numerical model leveraging the ANP to rank the memory technologies regarding their weights. The highest weights identify the most suitable technology for TCAM. We perform simulations to show the effectiveness of the mathematical model utilizing the ANP. The results show that the suggested methodology reduces the recovery delay, improves the packets received ratio (PRR), decreases the jitter, and increases the throughput.

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Section: Problem Formulationmentioning

confidence: 99%

“…The OpenFlow tables in switches are stored in TCAM. The works in [9][10][11][12][13] show different schemes for the efficiency and fast searching of TCAM. Moreover, they also show the cost and energy efficiency of the TCAM employing different strategies for efficiency of the TCAM.…”

Section: Introductionmentioning

confidence: 99%

An Effective Selection of Memory Technologies for TCAM to Improve the Search Operations: Demonstration of Memory Efficiency in SDN Recovery

Alahmadi,

Chung

2024

Electronics

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“…Ternary CAM (TCAM) and binary CAM (BiCAM) are two groups of CAM cells [6]. In this case, the TCAM uses all 0s, 1s, and x [don't care set], while the BiCAM uses both 0 s and 1 s [7]. Moreover, sparse clustering networks have been used to develop a small number of associated memories.…”

Section: Introductionmentioning

confidence: 99%

Design a self-controlled high-performance evaluation of content addressable memories using 45 nm technology

Inamanamelluri,

Dhanasekaran,

Baskar

2024

IJEECS

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A special type of random access memory (RAM) array called as content addressable memory (CAM), in which stored data is compared with the search data which can be returning the address. In the applications of highspeed searching, the CAMs are used. NOR type matchline CAMs are helpful for applications requiring faster search speeds. Because the NOR type match line (ML) CAM consumes a lot of power, therefore many published designs have attempted to reduce power consumption. The design self-controlled high-performance content addressable memories (SC-CAM) using 45-nm technology is presented in this paper. The 6T 4×4 CAM arrays in this paper uses SC logic and Tanner tools 45-nm technology. When compared to the conventional CAM, described SC-CAM architecture reduces the number of voltages sources. Described 6T 4×4 SC-CAM design needs less number of MOSFETs than existed 8T 4×4 CAM array and thus reduces the area with high speed.

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“…1) Too power-hungry [15], [19], [17], [20], [21], [22] 2) Slower than conventional SRAM-based caches [23], [24] 3) Not scalable, making the implementation of large caches, many-way associativity, or other associative memories impractical [16], [18], [20], [25], [26] 4) Too expensive (in terms of silicon area) [18], [19], [25] In this paper, we revisit the use of associative memories in computer microarchitecture, focusing on caches, but with relevance to other microarchitectural components that could benefit from full-associativity. This is done based on (1) a novel Complementary CAM (CCAM) bitcell that enables low-power CAM implementation, (2) a fully-associative tag array (FASTA) architecture, constructed with the CCAM bitcell, providing low-latency, precharge-free operation, and (3) a novel Very-Many-Way Associative (VMWA) cache architecture, built using FASTA.…”

Section: Introductionmentioning

confidence: 99%

FASTA: Revisiting Fully Associative Memories in Computer Microarchitecture

Garzón,

Hanhan,

Lanuzza

et al. 2024

IEEE Access

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Associative access is widely used in fundamental microarchitectural components, such as caches and TLBs. However, associative (or content addressable) memories (CAMs) have been traditionally considered too large, too energy-hungry, and not scalable, and therefore, have limited use in modern computer microarchitecture. This work revisits these presumptions and proposes an energy-efficient fullyassociative tag array (FASTA) architecture, based on a novel complementary CAM (CCAM) bitcell. CCAM offers a full CMOS solution for CAM, removing the need for time-and energy-consuming precharge and combining the speed of NOR CAM and low energy consumption of NAND CAM. While providing better performance and energy consumption, CCAM features a larger area compared to state-of-the-art CAM designs. We further show how FASTA can be used to construct a novel aliasing-free, energy-efficient, Very-Many-Way Associative (VMWA) cache. Circuit-level simulations using 16 nm FinFET technology show that a 128 kB FASTA-based 256-way 8-set associative cache is 28% faster and consumes 88% less energy-per-access than a same sized 8-way (256-set) SRAM based cache, while also providing aliasingfree operation. System-level evaluation performed on the Sniper simulator shows that the VMWA cache exhibits lower Misses Per Kilo Instructions (MPKI) for the majority of benchmarks. Specifically, the 256way associative cache achieves 17.3%, 11.5%, and 1.2% lower average MPKI for L1, L2, and L3 caches, respectively, compared to a 16-way associative cache. The average IPC improvement for L1, L2, and L3 caches are 1.6%, 1.4%, and 0.2%, respectively.

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Energy-Efficient Precharge-Free Ternary Content Addressable Memory (TCAM) for High Search Rate Applications

Cited by 26 publications

References 41 publications

An Effective Selection of Memory Technologies for TCAM to Improve the Search Operations: Demonstration of Memory Efficiency in SDN Recovery

An Effective Selection of Memory Technologies for TCAM to Improve the Search Operations: Demonstration of Memory Efficiency in SDN Recovery

Design a self-controlled high-performance evaluation of content addressable memories using 45 nm technology

FASTA: Revisiting Fully Associative Memories in Computer Microarchitecture

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