End-to-End Implementation of Various Hybrid Neural Networks on a Cross-Paradigm Neuromorphic Chip

Wang, Guanrui; Ma, Songchen; Wu, Yujie; Pei, Jing; Zhao, Rong; Shi, Luping

doi:10.3389/fnins.2021.615279

Cited by 11 publications

(11 citation statements)

References 41 publications

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“…In addition to ANNs, we also demonstrate that TianjicX is able to support SNNs, and hybrid spiking/non-spiking models. The performance and power consumption for representative SNNs and hybrid models ( 39 ) are listed in Table 2. Details of the experiments are provided in Materials and Methods.…”

Section: Resultsmentioning

confidence: 99%

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Neuromorphic computing chip with spatiotemporal elasticity for multi-intelligent-tasking robots

Pei

Zhang

et al. 2022

Sci. Robot.

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Recent advances in artificial intelligence have enhanced the abilities of mobile robots in dealing with complex and dynamic scenarios. However, to enable computationally intensive algorithms to be executed locally in multitask robots with low latency and high efficiency, innovations in computing hardware are required. Here, we report TianjicX, a neuromorphic computing hardware that can support true concurrent execution of multiple cross-computing-paradigm neural network (NN) models with various coordination manners for robotics. With spatiotemporal elasticity, TianjicX can support adaptive allocation of computing resources and scheduling of execution time for each task. Key to this approach is a high-level model, “Rivulet,” which bridges the gap between robotic-level requirements and hardware implementations. It abstracts the execution of NN tasks through distribution of static data and streaming of dynamic data to form the basic activity context, adopts time and space slices to achieve elastic resource allocation for each activity, and performs configurable hybrid synchronous-asynchronous grouping. Thereby, Rivulet is capable of supporting independent and interactive execution. Building on Rivulet with hardware design for realizing spatiotemporal elasticity, a 28-nanometer TianjicX neuromorphic chip with event-driven, high parallelism, low latency, and low power was developed. Using a single TianjicX chip and a specially developed compiler stack, we built a multi-intelligent-tasking mobile robot, Tianjicat, to perform a cat-and-mouse game. Multiple tasks, including sound recognition and tracking, object recognition, obstacle avoidance, and decision-making, can be concurrently executed. Compared with NVIDIA Jetson TX2, latency is substantially reduced by 79.09 times, and dynamic power is reduced by 50.66%.

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Section: Resultsmentioning

confidence: 99%

“…In addition, TianjicX is also a hardware platform for the end-to-end implementation of hybrid spiking and nonspiking models, so we also decide to test multiple types of hybrid LeNet. We adopt the same NN structures proposed in the previous paper ( 39 ) and evaluate the four introduced signal conversion methods in the hybrid models.…”

Section: Methodsmentioning

confidence: 99%

Neuromorphic computing chip with spatiotemporal elasticity for multi-intelligent-tasking robots

Pei

Zhang

et al. 2022

Sci. Robot.

Self Cite

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“…In [134], Wang et al propose an end-to-end framework for mapping hybrid neural networks involving ANN and SNN to the Tianjic neuromorphic hardware [135]. While intensive data representation of ANNs makes them achieve higher accuracy, event-driven spike trains of SNNs make them energy efficient.…”

Section: System Software For Performance and Energy Optimizationmentioning

confidence: 99%

“…Loihi [25] Core Utilization Compiler framework [95] Tianji [96], PRIME [97] Core Utilization Compiler framework [134] Tianjic [135] Core Utilization Compiler framework DecomposeSNN [112],…”

Section: System Software For Performance and Energy Optimizationmentioning

confidence: 99%

Implementing Spiking Neural Networks on Neuromorphic Architectures: A Review

Huynh¹,

Varshika²,

Paul³

et al. 2022

Preprint

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Recently, both industry and academia have proposed several different neuromorphic systems to execute machine learning applications that are designed using Spiking Neural Networks (SNNs). With the growing complexity on design and technology fronts, programming such systems to admit and execute a machine learning application is becoming increasingly challenging. Additionally, neuromorphic systems are required to guarantee real-time performance, consume lower energy, and provide tolerance to logic and memory failures. Consequently, there is a clear need for system software frameworks that can implement machine learning applications on current and emerging neuromorphic systems, and simultaneously address performance, energy, and reliability. Here, we provide a comprehensive overview of such frameworks proposed for both, platform-based design and hardware-software co-design. We highlight challenges and opportunities that the future holds in the area of system software technology for neuromorphic computing.

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“…Lee et al ( 2018 ) show the STDP-based unsupervised pre-training followed by supervised fine-tuning to improve the accuracy. Other works also show ANN-SNN hybridization that uses both ANN and SNN (Deng et al, 2020 ; Singh et al, 2020 ; Wang et al, 2021 ). On the other hand, hybridization in this article means, using only SNN with the different types of weight training algorithms (pre-trained backpropagation and STDP-based on-line leaning).…”

Section: Introductionmentioning

confidence: 99%

MONETA: A Processing-In-Memory-Based Hardware Platform for the Hybrid Convolutional Spiking Neural Network With Online Learning

et al. 2022

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We present a processing-in-memory (PIM)-based hardware platform, referred to as MONETA, for on-chip acceleration of inference and learning in hybrid convolutional spiking neural network. MONETAuses 8T static random-access memory (SRAM)-based PIM cores for vector matrix multiplication (VMM) augmented with spike-time-dependent-plasticity (STDP) based weight update. The spiking neural network (SNN)-focused data flow is presented to minimize data movement in MONETAwhile ensuring learning accuracy. MONETAsupports on-line and on-chip training on PIM architecture. The STDP-trained convolutional neural network within SNN (ConvSNN) with the proposed data flow, 4-bit input precision, and 8-bit weight precision shows only 1.63% lower accuracy in CIFAR-10 compared to the STDP accuracy implemented by the software. Further, the proposed architecture is used to accelerate a hybrid SNN architecture that couples off-chip supervised (back propagation through time) and on-chip unsupervised (STDP) training. We also evaluate the hybrid network architecture with the proposed data flow. The accuracy of this hybrid network is 10.84% higher than STDP trained accuracy result and 1.4% higher compared to the backpropagated training-based ConvSNN result with the CIFAR-10 dataset. Physical design of MONETAin 65 nm complementary metal-oxide-semiconductor (CMOS) shows 18.69 tera operation per second (TOPS)/W, 7.25 TOPS/W and 10.41 TOPS/W power efficiencies for the inference mode, learning mode, and hybrid learning mode, respectively.

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End-to-End Implementation of Various Hybrid Neural Networks on a Cross-Paradigm Neuromorphic Chip

Cited by 11 publications

References 41 publications

Neuromorphic computing chip with spatiotemporal elasticity for multi-intelligent-tasking robots

Neuromorphic computing chip with spatiotemporal elasticity for multi-intelligent-tasking robots

Implementing Spiking Neural Networks on Neuromorphic Architectures: A Review

MONETA: A Processing-In-Memory-Based Hardware Platform for the Hybrid Convolutional Spiking Neural Network With Online Learning

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