Encapsulant-Dependent Effects of Long-Term Low-Temperature Annealing on Interstitial Defects in Mg-Ion-Implanted GaN

Abstract

The encapsulant-dependent effects of long-term low-temperature annealing on defects in Mg-ion-implanted GaN have been investigated using metal-oxide-semiconductor (MOS) diodes. Annealing was carried out at 600 ℃ under nitrogen flow without or with a cap layer of Al2O3, SiO2, or SiN. For annealing at 600 ℃ for 3 h, the capacitance-voltage characteristics of the Al2O3 cap annealed samples indicated the existence of acceptor-like defects, whereas those of the capless, SiO2 cap and SiN cap annealed samples exhibited bumps, which indicated the existence of donor-like defect level at around 0.8 eV from the conduction band edge EC. A more distinct result was obtained for annealing at 600 ℃ for 30 h. Namely, annealing of samples with the Al2O3 cap layer induced an acceptor-like defect level at EC -0.9 eV, whereas that with the SiN cap layer induced a donor-like defect level at EC -0.8 eV. Secondary ion mass spectroscopy and transmission electron microscopy studies revealed that interstitial Ga (Gai) in Mg-implanted GaN diffused into the Al2O3 cap layer but not into the SiN cap layer after annealing. Most possibly, the detected EC -0.8 eV level can be assigned to interstitial Gai.

Effects of low-temperature annealing on net doping profile of Mg-ion-implanted GaN studied by MOS capacitance–voltage measurement

“…Note that SiN-cap-annealed sample showed the highest N D -N A across the entire detection depth. This result is consistent with that of a previous study, 23) indicating that the Ga i diffusion during annealing at 600 °C was blocked by the SiN cap layer, resulting in the highest density of Ga i -related gap states in the vicinity of the Mg-implanted GaN surface. Even in the samples with other cap layers, the profiles should have been affected by the degree of Ga i diffusion into each cap layer.…”

“…This is possibly because of the fact that the negatively charged N i defects increased in density in the vicinity of the GaN surface, as discussed in the previous work. 23) Although N i and Ga i can become mobile upon annealing at 600 °C, 22) it is unlikely that the V Ga V N defects diffuse at this temperature. 24) Indeed, upon annealing at 600 °C for 30 h, it has been confirmed that the Ga i defects diffused into the Al 2 O 3 cap layer, as shown in Table I and as described above.…”

“…However, the resultant horizontal shift of the C-V curve between the SiNcap-annealed and as-grown samples was smaller than that between the Al 2 O 3 -cap-annealed and as-grown samples. This can be explained by the blocking of Ga i diffusion at the SiN/ GaN interface, 23) resulting in a high concentration of Ga i in the vicinity of the implanted GaN surface to compensate the negative charges of N i and V Ga V N . The derived doping profile is shown in Fig.…”

“…In our previous study, we investigated the effects of longterm low-temperature annealing on Mg-implanted GaN using MOS structures. 23) The main results are summarized in Table I. The defect level E T at 0.8 eV below the conduction band edge E C corresponding to Ga i was detected for MOS samples with SiO 2 cap, SiN cap, and capless annealing, while a defect level assigned to N i was detected at E C -E T = 0.9 eV for the sample with Al 2 O 3 cap annealing.…”

“…The diffusion of interstitial defects will be discussed. In our previous papers, 23,27) we used the capacitance-voltage (C-V ) curves with the bias sweep swept from the positive end to the negative end only for indicating hysteresis. In this study, important information was derived from the same C-V curves.…”