Enabling OpenCL and SYCL for RISC-V processors

Burns, Rod; Davidson, C. L.; Dodds, Aidan

doi:10.1145/3456669.3456687

Cited by 3 publications

(1 citation statement)

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“…6 Second, platforms may have accelerators operating next to a CPU, but the accelerator(s) may not be available to run SYCL kernels because the hardware is in use by other non-SYCL code, or there is no OpenCL or other backend runtime implementation support for the accelerator, such as RISC-V targets, for which OpenCL and SYCL support is still experimental. 7 Emerging, early-stage CPUs, DSPs and other new and especially embedded platforms may initially often not have enough operating system or tools support for separate backend runtimes, requiring dedicated SYCL compiler support to enable running and accelerating SYCL applications on such platforms. Consequently, hipSYCL, 8 DPC++, 9 and ComputeCpp 10 actively extend their SYCL implementations to support non-OpenCL targets.…”

Section: Introductionmentioning

confidence: 99%

Improving performance of SYCL applications on CPU architectures using LLVM‐directed compilation flow

Ghiglio

Dolinsky

Goli

et al. 2023

Concurrency and Computation

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SummaryThe wide adoption of SYCL as an open‐standard API for accelerating C++ software in domains such as HPC, automotive, artificial intelligence, machine learning, and other areas necessitates efficient compiler and runtime support for a growing number of different platforms. Existing SYCL implementations provide support for various devices like CPUs, GPUs, DSPs, FPGAs and so forth, typically via OpenCL or CUDA backends. While accelerators have increased the performance of user applications significantly, employing CPU devices for further performance improvement is beneficial due to the significant presence of CPUs in existing data‐centers. SYCL applications on CPUs, currently go through an OpenCL backend. Though an OpenCL backend is valuable in supporting accelerators, it may introduce additional overhead for CPUs since the host and device are the same. Overheads like a run‐time compilation of the kernel, transferring of input/output memory to/from the OpenCL device, invoking the OpenCL kernel and so forth, may not be necessary when running on the CPU. While some of these overheads (such as data transfer) can be avoided by modifying the application, it can introduce disparity in the SYCL application's ability to achieve performance portability on other devices. In this article, we propose an alternate approach to running SYCL applications on CPUs. We bypass OpenCL and use a CPU‐directed compilation flow, along with the integration of whole function vectorization to generate optimized host and device code together in the same translation unit. We compare the performance of our approach—the CPU‐directed compilation flow, with an OpenCL backend for existing SYCL‐based applications, with no code modification for BabelStream benchmark, Matmul from the ComputeCpp SDK, N‐body simulation benchmarks and SYCL‐BLAS (Aliaga et al. Proceedings of the 5th International Workshop on OpenCL; 2017.), on CPUs from different vendors and architectures. We report a performance improvement of up to on BabelStream benchmarks, up to on Matmul, up to on the N‐body simulation benchmark and up to 16% on SYCL‐BLAS.

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Section: Introductionmentioning

confidence: 99%

Improving performance of SYCL applications on CPU architectures using LLVM‐directed compilation flow

Ghiglio

Dolinsky

Goli

et al. 2023

Concurrency and Computation

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Towards performance portability of AI models using SYCL-DNN

Tanvir

Narasimhan

Goli

et al. 2022

International Workshop on OpenCL

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Programming for High-Performance Computing on Edge Accelerators

Kang

2023

Mathematics

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The field of edge computing has grown considerably over the past few years, with applications in artificial intelligence and big data processing, particularly due to its powerful accelerators offering a large amount of hardware parallelism. As the computing power of the latest edge systems increases, applications of edge computing are being expanded to areas that have traditionally required substantially high-performant computing resources such as scientific computing. In this paper, we review the latest literature and present the current status of research for implementing high-performance computing (HPC) on edge devices equipped with parallel accelerators, focusing on software environments including programming models and benchmark methods. We also examine the applicability of existing approaches and discuss possible improvements necessary towards realizing HPC on modern edge systems.

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Enabling OpenCL and SYCL for RISC-V processors

Cited by 3 publications

References 0 publications

Improving performance of SYCL applications on CPU architectures using LLVM‐directed compilation flow

Improving performance of SYCL applications on CPU architectures using LLVM‐directed compilation flow

Towards performance portability of AI models using SYCL-DNN

Programming for High-Performance Computing on Edge Accelerators

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