Enabling faster VSB writing of 193i curvilinear ILT masks that improve wafer process windows for advanced memory applications

Pang, Liang; Russell, E. Vidal; Baggenstoss, Bill; Lu, Yang; Lee, Michael; Digaum, Jennefir L.; Yang, Manman; Pearman, Ryan; Ungar, P. Jeffrey; Lu, Sha; Bouaricha, Ali; Pomerantsev, Michael; Niewczas, Mariusz; Wang, Kechang; Su, Bo; Meyer, Michael; Fujimura, Aki

doi:10.1117/12.2579729

Cited by 8 publications

(6 citation statements)

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“…This work was funded by the institutes for which the authors work. Furthermore, this paper has been revised and updated based on our previous SPIE Proceedings paper presented at SPIE Photomask Technology 2020 30 , 31 …”

Section: Acknowledgmentsmentioning

confidence: 99%

Make the impossible possible: use variable-shaped beam mask writers and curvilinear full-chip inverse lithography technology for 193i contacts/vias with mask-wafer co-optimization

Pang,

Lu,

Russell

et al. 2024

J. Micro/Nanopattern. Mats. Metro.

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Full-chip curvilinear inverse lithography technology (ILT) requires mask writers to write full reticle curvilinear mask patterns in a reasonable write time. We jointly study and present the benefits of a full-chip, curvilinear, stitchless ILT with mask-wafer cooptimization (MWCO) for variable-shaped beam (VSB) mask writers and validate its benefits on mask and wafer at Micron Technology. The full-chip ILT technology employed, first demonstrated in a paper presented at the 2019 SPIE Photomask Technology Conference, produces curvilinear ILT mask patterns without stitching errors, and with process windows enlarged by over 100% compared to the OPC process of record, while the mask was written by multibeam mask writer. At the 2020 SPIE Advanced Lithography Conference, a method was introduced in which MWCO is performed during ILT optimization. This approach enables curvilinear ILT for 193i masks to be written on VSB mask writers within a practical, 12-h time frame, while also producing the largest process windows. We first review MWCO technology, then curvilinear ILT mask patterns written by VSB mask writer, and then show the corresponding 193i process wafer prints. Evaluations of mask write times and mask quality in terms of critical dimension uniformity and process windows are also presented.

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Section: Acknowledgmentsmentioning

confidence: 99%

Make the impossible possible: use variable-shaped beam mask writers and curvilinear full-chip inverse lithography technology for 193i contacts/vias with mask-wafer co-optimization

Pang,

Lu,

Russell

et al. 2024

J. Micro/Nanopattern. Mats. Metro.

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“…Despite its significant advantages, the widespread adoption of ILT is still hindered by the need for complex calculations and the challenge of writing curved-shaped masks 1 . 2 To address these challenges, several studies have proposed ILT methods that adhere to Mask Rule Constraints (MRC) 3 . 4 This approach simplifies curved shapes into "Manhattanized" rectangular shapes, thereby enhancing the manufacturability of masks.…”

Section: Introductionmentioning

confidence: 99%

Balancing mask manufacturability and image quality with inverse lithography: a study on variable fracture sizes

Li,

Mu,

Fan

et al. 2024

Optical and EUV Nanolithography XXXVII

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Inverse lithography technology (ILT) has been the focus of research for several years due to its ability to produce theoretically optimal mask shapes. However, its widespread adoption has been hindered by the complex computational techniques involved and the challenges associated with writing curvilinear ILT mask shapes. To enhance manufacturability, one approach involves streamlining the curvilinear mask shapes by converting them into simplified, 'Manhattanized' rectangular shapes using a mask rule constraint (MRC) compliant ILT method. The aim of this study is to examine the influence of mask fracture sizes on manufacturability and to assess the impact of traditional optical proximity correction (OPC), curvilinear ILT, and Manhattanized ILT on the quality of photographic images. The study focuses on challenging cell structures, and generating pattern shapes using traditional OPC, curvilinear ILT, and Manhattanized ILT with MRC compliance. Fracture sizes were varied from 5nm to 25nm in increments of 5nm. To compare mask manufacturability across different patterns, several factors were evaluated, including data fracturing, writing time, and metrology. Photographic image quality metrics, such as NILS (Normalized Image Log-Slope), MEEF (Mask Error Enhancement Factor), EPE (Edge Placement Error), PV-band (Process Variation Band), and CDOF (Common Depth of Focus) were also assessed. The comprehensive analysis aims to provide a better understanding of the trade-offs between different approaches and guide future improvements in mask manufacturability and image quality.

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“…As lithography moves deeper into the regime of low k1-factor, resolution enhancement technology # These authors contributed equally to this work *Jiangliu.Shi@bjsamt.org.cn (RET) has been widely utilized to deliver a production-worthy patterning solution. In recent years, Inverse Lithography Technology (ILT), a new Optical Proximity Correction (OPC) technique, has been widely developed in advanced Logic and Memory productions [1][2][3], offering further improved imaging performance. Compared to the conventional OPC, ILT enables a better process window (PW) with reduced edge placement error (EPE) and increased wafer critical dimension uniformity (CDU) [2][3][4] etc.…”

Section: Introductionmentioning

confidence: 99%

“…In recent years, Inverse Lithography Technology (ILT), a new Optical Proximity Correction (OPC) technique, has been widely developed in advanced Logic and Memory productions [1][2][3], offering further improved imaging performance. Compared to the conventional OPC, ILT enables a better process window (PW) with reduced edge placement error (EPE) and increased wafer critical dimension uniformity (CDU) [2][3][4] etc. However, one of the biggest ILT challenges is that for nonrectilinear mask shapes, the mask writing is extremely complex and slow [5], which can potentially produce mask manufacturing errors.…”

Section: Introductionmentioning

confidence: 99%

Quantitative study of local MEEF of 2D mask corrected by inverse lithography technology

Wang,

Sun,

et al. 2023

Photomask Technology 2023

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Enabling faster VSB writing of 193i curvilinear ILT masks that improve wafer process windows for advanced memory applications

Cited by 8 publications

References 0 publications

Make the impossible possible: use variable-shaped beam mask writers and curvilinear full-chip inverse lithography technology for 193i contacts/vias with mask-wafer co-optimization

Make the impossible possible: use variable-shaped beam mask writers and curvilinear full-chip inverse lithography technology for 193i contacts/vias with mask-wafer co-optimization

Balancing mask manufacturability and image quality with inverse lithography: a study on variable fracture sizes

Quantitative study of local MEEF of 2D mask corrected by inverse lithography technology

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