Enabling a Bufferless Core Network Using Edge-to-Edge Packet-Level FEC

Vishwanath, Arun; Sivaraman, Vijay; Thottan, Marina; Dovrolis, Constantine

doi:10.1109/infcom.2010.5461901

Cited by 12 publications

(7 citation statements)

References 21 publications

(27 reference statements)

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“…As optical networks [69,71] become more widely deployed, bufferless architectures are going to become more important to the network community due to challenges of buffering in optical networks. While some constraints will likely be different (e.g., bandwidth), there will likely be strong parallels in topology, routing techniques, and congestion control.…”

Section: Discussionmentioning

confidence: 99%

On-chip networks from a networking perspective

NychisGeorge

FallinChris

MoscibrodaThomas

et al. 2012

SIGCOMM Comput. Commun. Rev.

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In this paper, we present network-on-chip (NoC) design and contrast it to traditional network design, highlighting similarities and differences between the two. As an initial case study, we examine network congestion in bufferless NoCs. We show that congestion manifests itself differently in a NoC than in traditional networks. Network congestion reduces system throughput in congested workloads for smaller NoCs (16 and 64 nodes), and limits the scalability of larger bufferless NoCs (256 to 4096 nodes) even when traffic has locality (e.g., when an application's required data is mapped nearby to its core in the network). We propose a new source throttlingbased congestion control mechanism with application-level awareness that reduces network congestion to improve system performance. Our mechanism improves system performance by up to 28% (15% on average in congested workloads) in smaller NoCs, achieves linear throughput scaling in NoCs up to 4096 cores (attaining similar performance scalability to a NoC with large buffers), and reduces power consumption by up to 20%. Thus, we show an effective application of a network-level concept, congestion control, to a class of networks -bufferless on-chip networks -that has not been studied before by the networking community.

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Section: Discussionmentioning

confidence: 99%

On-chip networks from a networking perspective

NychisGeorge

FallinChris

MoscibrodaThomas

et al. 2012

SIGCOMM Comput. Commun. Rev.

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“…Studies [6,13] illustrated that they were detrimental to network performance. Later studies proposed expensive solutions such as disabling the above mechanisms, specializing hardware to pace flows [14,15], or enabling Data-Center TCP (DCTCP) [16] over Explicit-Congestion-Notification (ECN). However, paced flows sometimes suffer in performance when competing with non-paced short flows [17], and DCTCP requires explicit feedback from middleboxes that are not widely deployed.…”

Section: Background and Related Workmentioning

confidence: 99%

Exploring parallelism and desynchronization of TCP over high speed networks with tiny buffers

Xue

Chiu

Kondikoppa

et al. 2015

Computer Communications

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a b s t r a c tThe buffer sizing problem is a big challenge for high speed network routers to reduce buffer cost without throughput loss. The past few years have witnessed debate on how to improve link utilization of high speed networks where the router buffer size is idealized into dozens of packets. Theoretically, the buffer size can be shrunk by more than 100 times. Under this scenario, widely argued proposals for TCP traffic to achieve acceptable link capacities mandate three necessary conditions: over-provisioned core link bandwidth, nonbursty flows, and tens of thousands of asynchronous flows. However, in high speed networks where these conditions are insufficient, TCP traffic suffers severely from routers with tiny buffers.To explore better performance, we propose a new congestion control algorithm called Desynchronized Multi-Channel TCP (DMCTCP) that creates a flow with parallel channels. These channels can desynchronize each other to avoid TCP loss synchronization, and they can avoid traffic penalties from burst losses. Over a 10 Gb/s large delay network ruled by tiny buffer routers, our emulation results show that bottleneck link utilization can reach over 80% with much fewer number of flows. Compared with other TCP congestion control variants, DMCTCP can also achieve much better performance in high loss rate networks. Facing the buffer sizing challenge, our study is a new step towards the deployment of optical packet switching networks.

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“…This submission is an extended and improved version of our paper presented at the IEEE INFOCOM 2010 conference [30].…”

Section: Introductionmentioning

confidence: 99%

Enabling a Bufferless Core Optical Network Using Edge-to-Edge Packet-Level FEC

Vishwanath

Sivaraman

Thottan³

et al. 2013

IEEE Trans. Commun.

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Abstract-To cope with the phenomenal growth of the Internet over the next decade, core networks are expected to scale to capacities of terabits-per-second and beyond. Increasing the role of optics for switching and transmission inside the core network seems to be the most promising way forward to accomplish this capacity scaling. Unfortunately, unlike electronic memory, it remains a formidable challenge to build even a few packets of integrated all-optical buffers. In this context, we envision a bufferless (or near-zero buffer) core optical network and make three contributions: First, we propose a novel edge-to-edge based packet-level forward error correction (FEC) scheme that combats packet loss in the bufferless core, and characterise the impact of FEC strength on loss at a single link. Second, we develop a global optimisation framework for multi-hop networks, and propose a heuristic algorithm that adjusts FEC strength to achieve fairness amongst the different single-and multi-hop flows. Finally, we evaluate the performance of our FEC scheme for realistic mixes of short-and long-lived TCP flows, and show that edge-to-edge packet-level FEC can be tuned to effectively mitigate contention losses in the core, thus opening the doors to bufferless optical networks in the near future.

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Enabling a Bufferless Core Network Using Edge-to-Edge Packet-Level FEC

Cited by 12 publications

References 21 publications

On-chip networks from a networking perspective

On-chip networks from a networking perspective

Exploring parallelism and desynchronization of TCP over high speed networks with tiny buffers

Enabling a Bufferless Core Optical Network Using Edge-to-Edge Packet-Level FEC

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