EMI prediction in slew rate controlled switching I/O buffers

Shin, Injae; Kim, Nahyun; Hwang, Jisu; Kim, Jungmin; Kim, Soyoung

doi:10.1109/apemc.2013.7360620

Cited by 2 publications

(4 citation statements)

References 7 publications

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“…In this case, the EMI problem is more serious. To solve this problem, slew rate was controlled in conventional transmitter (TX) [1]. The slew rate control reduces the maximum current peak in the output drivers.…”

Section: Introductionmentioning

confidence: 99%

A Low EMI Transmitter for DRAM Interface with Quadrature Clock Corrector

Lee

2021

2021 IEEE International Symposium on Circuits and Systems (ISCAS)

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This paper presents a transmitter with quadrature clock corrector (QCC) and phase controller for reducing EMI problem. The phase controller consists of phase interpolator and transmission gate (TG). The transmission gate is added to turn function on and off. The quadrature clock corrector is used for signal integrity. The circuit is designed in 180-nm CMOS process using 1.8-V supply. The operating frequency is 3.2 Gbps. For duty cycle distortion of 30% ~ 70% and phase error of ±30 degrees, the maximum duty cycle error of corrected clock is about 0.4%, and the phase error between the OUT0 and OUT90 signal is up to about 3.9 degrees. The duty correction time is about 5ns and phase correction time is about 36ns. And the maximum current peak of output drivers is 23% less than that of conventional transmitter.

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Section: Introductionmentioning

confidence: 99%

A Low EMI Transmitter for DRAM Interface with Quadrature Clock Corrector

Lee

2021

2021 IEEE International Symposium on Circuits and Systems (ISCAS)

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“…1 [5]. HSPICE simulations were done using the post-layout RC extraction netlist of the IC, an RLC equivalent model of the package and the S-parameter of the PCB [6,7].…”

Section: Co-simulation Methodsmentioning

confidence: 99%

“…The far-field co-simulations have been applied to predict the EMI from a DC-DC converter in [3]. In [4] and [5], a full-wave simulation was done to extract the S-parameters, and the EMI prediction was done using a SPICE simulator. In [4], when EMI is predicted using the circuit model, the EMI can be estimated at one point, but the field distribution was not predicted.…”

Section: Introductionmentioning

confidence: 99%

See 1 more Smart Citation

EMI Prediction of Slew-Rate Controlled I/O Buffers by Full-Wave and Circuit Co-Simulation

Shin¹,

Hwang²,

Kim³

2014

JSTS:Journal of Semiconductor Technology and Science

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Abstract-In this paper, a modeling and co-simulation methodology is proposed to predict the radiated electromagnetic interference (EMI) from on-chip switching I/O buffers. The output waveforms of I/O buffers are simulated including the on-chip I/O buffer circuit and the RC extracted on-chip interconnect netlist, package, and printed circuit board (PCB). In order to accurately estimate the EMI, a full-wave 3D simulation is performed including the measurement environment. The simulation results are compared with near-field electromagnetic scan results and farfield measurements from an anechoic chamber, and the sources of emission peaks were analyzed. For accurate far-field EMI simulation, PCB power trace models considering IC switching current paths and external power cable models must be considered for accurate EMI prediction. With the proposed EMI simulation model and flow, the electromagnetic compatibility can be tested even before the IC is fabricated.

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EMI prediction in slew rate controlled switching I/O buffers

Cited by 2 publications

References 7 publications

A Low EMI Transmitter for DRAM Interface with Quadrature Clock Corrector

A Low EMI Transmitter for DRAM Interface with Quadrature Clock Corrector

EMI Prediction of Slew-Rate Controlled I/O Buffers by Full-Wave and Circuit Co-Simulation

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