2009 International Conference on Electromagnetics in Advanced Applications 2009
DOI: 10.1109/iceaa.2009.5297367
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EMI-inducted failures in MOS power transistors

Abstract: The present paper discusses the susceptibility of MOS power transistors to electromagnetic interference affecting the drain terminal. To this purpose, the Low Side configuration is considered and susceptibility analyses are carried out referring to simple small-signal models of the MOS transistor. The prediction of the susceptibility levels obtained in this way are validated through time domain simulations and experimental tests.

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Cited by 5 publications
(7 citation statements)
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“…Similar analyses were previously performed in [7] where a power transistor with a much larger gate parasitic resistance was considered. In that case the predictions of the power transistor failures, that were based on small-signal analyses, were in good agreement with the results of time domain simulations but they had not been confirmed by experimental results.…”
Section: Mos Transistor Susceptibility To Emimentioning
confidence: 75%
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“…Similar analyses were previously performed in [7] where a power transistor with a much larger gate parasitic resistance was considered. In that case the predictions of the power transistor failures, that were based on small-signal analyses, were in good agreement with the results of time domain simulations but they had not been confirmed by experimental results.…”
Section: Mos Transistor Susceptibility To Emimentioning
confidence: 75%
“…In a previous work [7], it was obtained that in the considered framework the model of the parasitic gate resistance proposed by Razavi et al [10], which generally provides good results both in linear and non-linear performance estimations, fails to accurately predict the power transistor susceptibility. Therefore, in this paper a new model that takes in account the distributed effect of large parasitic gate electrode resistance has been proposed.…”
Section: Discussionmentioning
confidence: 98%
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