Emerging Fluorite-Structured Antiferroelectrics and Their Semiconductor Applications

Abstract

The ferroelectric properties of fluorite-structured oxides have attracted significant attention from researchers because of their potential applications in nonvolatile memory devices, which are enabled by their compatibility with the complementary metal oxide semiconductor technology and physical scalability to a thickness below 10 nm. Another important emerging property of these materials is their antiferroelectricity, which originates from the field-induced transition between the polar and nonpolar phases. Various applications of fluorite-structured antiferroelectrics, such as those in volatile logic devices and cell capacitors for dynamic random-access memory, engineered nonvolatile memory, and energy storage/conversion devices, have been recently proposed, although they have not been investigated in detail compared to fluorite-structured ferroelectrics. The volatile nature of fluorite-structured antiferroelectrics with a characteristic field-induced phase transition, which clearly distinguishes them from ferroelectrics, have endowed these materials with unique properties that cannot be achieved by ferroelectrics. Therefore, the emerging antiferroelectricity of fluorite-structured oxides is comprehensively reviewed in this paper from its fundamentals to various semiconductor applications based on the existing literature.

Hafnia-Based Ferroelectric Memory: Device Physics Strongly Correlated with Materials Chemistry

“…FeFET is one of the promising candidates to replace NAND with higher speed and endurance based on the characteristic operation mechanism based on ferroelectric materials. 39,88 The FeFET's structure closely resembles that of the MOSFET, with the key distinction being the substitution of the dielectric gate insulator with a ferroelectric material. Because of this simple structure, the scenario of replacement of charge trap Flash (CTF) by FeFET has been suggested as reasonable despite the increase in the cost per bit, because of superior performance, such as potentially achievable program/erase and read time shorter than 10 ns.…”

“…FeFET is one of the promising candidates to replace NAND with higher speed and endurance based on the characteristic operation mechanism based on ferroelectric materials. , The FeFET’s structure closely resembles that of the MOSFET, with the key distinction being the substitution of the dielectric gate insulator with a ferroelectric material. Because of this simple structure, the scenario of replacement of charge trap Flash (CTF) by FeFET has been suggested as reasonable despite the increase in the cost per bit, because of superior performance, such as potentially achievable program/erase and read time shorter than 10 ns. ,,, Reports indicate that the program/erase endurance of FeFETs is already comparable to or even superior to that of CTF, owing to its program/erase mechanism that does not rely on electron tunneling. ,,, However, a critical issue would be the disturbance expected during the program/erase. In NAND Flash, the cell transistors in the same string are serially connected, making it impossible to access individual cells simply by selecting the word line (WL) and bit line (BL).…”

“…With 2−3 nm thickness, the conduction by tunneling mechanism would be very difficult to suppress. 38,39 To resolve this issue, the E c value should be decreased while minimizing the degradation in the P r value. Nonetheless, the dimensional scaling of ferroelectric thin films strongly affects their polymorphism and the resulting ferroelectricity.…”

“…24,44,89,90 Reports indicate that the program/ erase endurance of FeFETs is already comparable to or even superior to that of CTF, owing to its program/erase mechanism that does not rely on electron tunneling. 39,88,91,92 However, a critical issue would be the disturbance expected during the program/erase. In NAND Flash, the cell transistors in the same string are serially connected, making it impossible to access individual cells simply by selecting the word line (WL) and bit line (BL).…”

“…Therefore, to maintain a 1.2 V operation voltage, the V c needs to be 0.2–0.3 V, suggesting that the physical thickness should be 2–3 nm while assuming 1.0 MV/cm E c . With 2–3 nm thickness, the conduction by tunneling mechanism would be very difficult to suppress. , To resolve this issue, the E c value should be decreased while minimizing the degradation in the P r value. Nonetheless, the dimensional scaling of ferroelectric thin films strongly affects their polymorphism and the resulting ferroelectricity.…”