Elimination of Stacking Fault in Si Epitaxial Layer by Heat Treatment

Abstract

Elimination of stacking faults in Si epitaxial layer by heat treatment is investigated by observing repeated etch patterns. Two types of stacking faults are observed. One of them (about 70∼90%) is eliminated easily by heat treatment and the other (about 10∼30%) is stable and cannot be eliminated. Heat treatment at a temperature higher than 450°C is required to eliminate the faults in either atmosphere of O2, Ar and H2. In the temperature range higher than 600°C, the elimination is completed within a few minutes. Contrary to Mendelson's model, the observations on the initial stage of elimination process show that the elimination proceeds locally from the surface of growth layer to the substrate-growth interface.

Annihilation Behavior of Planar Defects on Phosphorus-Doped Silicon at Low Temperatures

“…16 The elimination begins locally from the layer surface and proceeds to the apex of the tetrahedron structure in the {111}-oriented layer case. 17 On the other hand, the elimination occurs locally, not only from the layer surface, but also from partial dislocation of the SF under the surface of the growth layer in a {100}-oriented Si epitaxial layer, 18 because of the high temperature annealing process above 800 C.…”

Thermal annihilation process of stacking-fault tetrahedron defect in Si-film epitaxy

“…Since these defects have the size of a few nano-to micro-meters and have deep electronic levels in the band gap of bulk Si [3,4], they cause serious damages on devices. One of efficient methods to remove these macroscopic defects is to heat grown films above some critical temperatures, around 800 K for the Si SFT [5]. However, there is no microscopic understanding of this annihilation process.…”