Abstract:We report on a scheme to eliminate false codes generated due to switching delays among the output bits of an asynchronous parallel successive approximation analog-todigital converter (SA-ADC) developed by Lin and Liu [1]. False output codes are eliminated by converting the binary outputs to Gray codes. A novel asynchronous parallel gray-to-binary converter is introduced to effectively reduce switching delays from 10.0 -26.5 ns to 767 -962 ps, when operating with a 50 kHz triangular input and 2V power supply. S… Show more
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