Eliminating redundant fragment shader executions on a mobile GPU via hardware memoization

Arnau, José-María; Parcerisa, Joan-Manuel; Xekalakis, Polychronis

doi:10.1109/isca.2014.6853207

Cited by 38 publications

(46 citation statements)

References 19 publications

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“…Approximate computing, which broadly refers to technique that harvests substantial performance/energy benefits 7 We choose QoS=0.8 as an example for demonstration purposes. Users should determine the proper QoS metric and level for their individual application.…”

Section: Related Workmentioning

confidence: 99%

“…Users should determine the proper QoS metric and level for their individual application. level (e.g., fault-allowable storage [36], voltage overscaling [37], DRAM refresh [38], analog circuits [39], neural acceleration [40], descent fault recovery [41], remote memory data prediction [42], function memorization [5,7], control/memory divergence [6]) and software level (e.g., loop perforation [25], task skipping [43], loop early termination [4,44], program transformation [23], compilation [24], bitwdith reduction [38]). However, it is often not suitable to deploy the current approximate techniques directly to the scientific applications (e.g., weather simulation and molecular dynamics), which are usually numerically intensive and very sensitive to accuracy loss.…”

Section: Related Workmentioning

confidence: 99%

“…Besides, many of these applications are data-parallelism intensive, making them well-suited candidates for the emerging general-purpose GPU computation (GPGPU) [3]. Concerning the above reasons, approximate computing has become an attractive research topic for GPUs [4,5,6,7,8,9].…”

Section: Introductionmentioning

confidence: 99%

“…However, most existing GPU approximation designs are targeted for data-intensive applications [4,5,7,9], which are comparatively more error-tolerable. Furthermore, they primarily rely on the spatial or temporal locality among the nearby-data or the consecutive functions so as to approximate the requested data/computation based on their neighboring [4,5,8,9] or locally stored historical values [5,6,7,9].…”

Section: Introductionmentioning

confidence: 99%

“…Furthermore, they primarily rely on the spatial or temporal locality among the nearby-data or the consecutive functions so as to approximate the requested data/computation based on their neighboring [4,5,8,9] or locally stored historical values [5,6,7,9]. Such approaches, although quite efficient, may commit uneven errors across data elements or even catastrophic failures since the locality is not always held and the distortion to the final results could be considerable.…”

Section: Introductionmentioning

confidence: 99%

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SFU-Driven Transparent Approximation Acceleration on GPUs

Song

Wijtvliet

et al. 2016

Proceedings of the 2016 International Conference on Supercomputing

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Approximate computing, the technique that sacrifices certain amount of accuracy in exchange for substantial performance boost or power reduction, is one of the most promising solutions to enable power control and performance scaling towards exascale. Although most existing approximation designs target the emerging data-intensive applications that are comparatively more error-tolerable, there is still high demand for the acceleration of traditional scientific applications (e.g., weather and nuclear simulation), which often comprise intensive transcendental function calls and are very sensitive to accuracy loss. To address this challenge, we focus on a very important but long ignored approximation unit on today's commercial GPUs -the specialfunction unit (SFU), and clarify its unique role in performance acceleration of accuracy-sensitive applications in the context of approximate computing. To better understand its features, we conduct a thorough empirical analysis on three generations of NVIDIA GPU architectures to evaluate all the single-precision and double-precision numeric transcendental functions that can be accelerated by SFUs, in terms of their performance, accuracy and power consumption. Based on the insights from the evaluation, we propose a transparent, tractable and portable design framework for SFU-driven approximate acceleration on GPUs. Our design is software-based and requires no hardware or application modifications. Experimental results on three NVIDIA GPU platforms demonstrate that our proposed framework can provide fine-grained tuning for performance and accuracy trade-offs, thus facilitating applications to achieve the maximum performance under certain accuracy constraints.

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Section: Related Workmentioning

confidence: 99%

Section: Related Workmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

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SFU-Driven Transparent Approximation Acceleration on GPUs

Song

Wijtvliet

et al. 2016

Proceedings of the 2016 International Conference on Supercomputing

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DTM@GPU: Characterizing and evaluating trace redundancy in GPU

Marzulo

Sena

Nery

et al. 2018

Concurrency and Computation

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Summary In a program, there is usually a significant amount of instructions that are repeatedly executed with the same inputs during the execution. This redundancy allows the reuse of previous computations, potentially reducing the program execution time. The Dynamic Trace Memoization technique (DTM) was proposed to exploit the reuse of a dynamic sequence of redundant instructions for superscalar CPUs. This paper proposes the application of the DTM technique on a GPU architecture. We propose the DTM@GPU model that adapts the original DTM technique to the NVIDIA GPU architecture by introducing architectural modifications and the identification of different trace reuse styles in multithreaded environments. We investigate reuse opportunities in real‐world GPU applications and the potential performance gains. We also perform a detailed investigation on the characteristics of the reused traces. This characterization shows the number and size of the reused traces, the influence of the cache size on reuse rates, and the cycles that are saved when all threads in a warp reuse instructions or traces. The results show approximately up to 35.3% of reuse, yielding an estimated speedup gain of 10.7%.

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