Eliminating Performance Penalty of Scan

Abstract

Stringent performance requirements magnify the performance degradation impact of Design-for-Testability (DfT) techniques. As more aggressive performance optimizations are being employed, resulting in high-performance designs with reduced logic depth, the impact of scan multiplexers is becoming even more magnified. In this work, we propose a scan cell transformation technique that transfers the scan multiplexer delay from the input of the flip-flop to its output, enabling the removal of the scan multiplexer delay off the critical paths. By inserting a few shadow flip-flops properly, the proposed transformation technique retains test development (test data, quality, etc.) and application (test time, power dissipation, etc.) intact, fully complying with the conventional design and test flow. Experimental results justify the efficacy of the proposed techniques in eliminating the performance penalty of scan quickly and cost-effectively, and thus in enhancing functional speed of integrated circuits.

Retiming scan circuit to eliminate timing penalty

“…The retimed scan, therefore, can test DC as well as delay faults. Benchmark results show further timing improvement and reduced hardware overhead compared to previously reported results [10]. …”

“…A recently proposed method [10] to reduce the performance penalty of scan modifies the critical path of Figure 1 (b) as shown in Figure 2. The multiplexer is moved forward to the output of the destination flip-flop (original FF) and is replaced by a fanout that feeds into an added flip-flop (shadow FF) through an additional multiplexer.…”

“…A recent paper [10] describes a problem that occurs in scan testing. In scan design, every flipflop is preceded by a multiplexer that adds approximately two gate delays to the combinational path.…”

“…This, however, potentially reduces the fault coverage. An ingenious solution without having to resort to partial scan has been proposed in a recent paper [10]. That solution is outlined in Section 2.…”

“…This problem is outlined in a recent paper [10], which also proposes a solution. The purpose of the present work is to provide a retiming solution.…”