Electroplating Copper onto Resistive Barrier Films

Abstract

The relentless miniaturization of integrated circuit (IC) feature sizes has pushed mainstay aluminum alloy interconnects into a regime where electromigration failure and interconnect resistance-capacitance (RC) delays are becoming significant concerns. Primarily for these reasons, as well as potential cost and yield benefits of a copper/damascene process, efforts to develop copper interconnect capability have accelerated dramatically in recent years. Integrated circuits containing copper interconnects are now being manufactured, 1 and will be widely employed in the 180 nm technology generation. 2 Most current development work focuses on electroplating as the primary means for depositing copper films onto patterned dielectrics. 2 While this work can successfully draw on decades of industrial experience with copper deposition onto printed wiring boards (PWBs), there are factors that make IC metallization fundamentally different from PWB metallization. First, the wafers entering the plating process are several orders of magnitude more valuable than are circuit boards. This means that the equipment required to minimize yield loss due to handling errors, wafer contamination, or process variations is very expensive, and that the number of process steps should be kept low. Second, copper contamination can destroy the functionality of silicon devices. This means, among other things, that conductive barrier films must be used to keep copper from diffusing into either the dielectric or the device contacts. Finally, there are large differences in length scales, making the phenomena that control plating uniformity very different. For example, IC linewidths and via diameters are several hundred times smaller than PWB through-hole diameters. As a consequence, metal film thicknesses are at least 20 times smaller in ICs than they are in PWBs, making film resistance an important contributor to plated film thickness nonuniformity.A drawback to electrolytic Cu deposition on insulators is that a conductive layer, generally copper, must be deposited first by nonelectrochemical means to allow electronic current to be carried to all surfaces where plating is desired. This layer is usually deposited by electroless deposition, or by sputtering for semiconductor applications. The sputtered copper films provide good blanket coverage, but sometimes offer poor sidewall coverage of high-aspect trenches and vias. However, in semiconductor applications there is an alternative to sputtering. Because of the extreme sensitivity of silicon devices to copper contamination, a barrier film such as Ta or TaN is required to encapsulate the copper conductors. Since barrier films are somewhat conductive, it may be possible to eliminate the extra step of depositing a conduction layer by plating directly onto the barrier film.High sheet resistance is a major obstacle to electroplating onto barrier films. The films are less conductive than copper, and are very thin, typically about 500 Å thick. Under conventional plating conditions, extreme potential variati...

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