Electro-thermal and logi-thermal simulation of VLSI designs

Abstract

Due to severe thermal problems of today's VLSI integrated circuits the need for reliable and quick thermal, electro-thermal and logi-thermal simulation tools is increasing. In this paper, we discuss the latest advances in the SISSI package (simulator for integrated structures by simultaneous iteration) which is a tool developed originally for analog VLSI design. The improvements include electro-thermal ac and transient simulation and the consideration of the thermal voltage of Si-A1 contacts. Furthermore, we introduce a new module of SISSI, LOGITHERM, which is aimed at the self-consistent logic and thermal simulation of large digital VLSI designs. The features of our simulator package are highlighted by simulation examples that are compared in most cases with measurement results.

Thermal Modeling, Analysis, and Management in VLSI Circuits: Principles and Methods

“…The iterative solution takes place simultaneously for the thermal and electrical sub-networks. Representatives of this method are discussed in [29][41]- [43]. The advantage is the capability of considering very fast changes; the drawback is that the direct method requires a more complex implementation than the relaxation method.…”

“…A good example is reference [43], where the electrical-only and the thermal equivalent circuits are connected in one network via the thermal nodes, whose voltages represent the temperature values. The two subnetworks form a large network for which the network equations have to be solved, providing simultaneously the temperature and voltage values of the thermal and electrical sub-networks respectively.…”

Alleviating Thermal Constraints While Maintaining Performance Via Silicon- Based On-chip Optical Interconnects

“…Investigations have also been promoted by other VLSI-based simulation research, such as Rencz et al [25], the SISSI package [31], and others [32].…”

Global modeling and simulation of System-on-Chip embedding MEMS devices

“…The thermal validation of the system on package is becoming a key issue, on the other hand, the generation of dynamic thermal model for the package implies the coupling of the chip locations to the package for the use of electro-thermal simulators [9]. In this section two strongly related issues are discussed: the first is the electro thermal modeling of the package and the second is the thermal IC-package co-simulation.…”