Electrical transport in laser-crystallized polycrystalline silicon-germanium thin-films

Scheller, L.-P.; Weizman, M.; Nickel, N. H.; Yan, Bin

doi:10.1063/1.3194147

Cited by 14 publications

(9 citation statements)

References 15 publications

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“…6e. Therefore the dominant conduction mechanism at low temperatures (o 50 K) in the Cu 3 NZn x samples with a Zn concentration around 5.44 at.% is the hopping conduction, which often occurs in doped semiconductors, high-temperature superconductors, and many lowdimensional materials [28][29][30][31]. At above 50 K, the electrical transport is dominated by thermal activation.…”

Section: Resultsmentioning

confidence: 99%

Insertion of Zn atoms into Cu3N lattice: Structural distortion and modification of electronic properties

Gao

Zhang

et al. 2011

Journal of Crystal Growth

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Section: Resultsmentioning

confidence: 99%

Insertion of Zn atoms into Cu3N lattice: Structural distortion and modification of electronic properties

Gao

Zhang

et al. 2011

Journal of Crystal Growth

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“…We can approximate there to be ∼10 13 cm −2 carrier density in the grain boundaries. [27] Thus, in our 10 −4 cm 3 of film, we expect to see 1.97 × 10 14 carriers (19.7 cm 2 × 10 13 carriers/cm 2 ), or 1.97 × 10 18 cm −3 carrier density. This is close to our observed carrier density of ∼1.6 × 10 18 cm −3 for a 1-umthick as-deposited film.…”

Section: Optoelectronic Propertiesmentioning

confidence: 74%

Single‐Crystal Germanium Growth on Amorphous Silicon

McComber

Duan

Liu

et al. 2011

Adv Funct Materials

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The integration of photonics with electronics has emerged as a leading platform for microprocessor technology and the continuation of Moore's Law. As electronic device dimensions shrink, electronic signals encounter crippling delays and heating issues such that signal transduction across large on-chip distances becomes increasingly more difficult. However, these issues may be mitigated by the use of photonic interconnects combined with electronic devices in electronic-photonic integrated circuits (EPICs).The electronics in proposed EPIC designs perform the logic operations and shortdistance signal transmission, while photonic devices serve to transmit signals over longer lengths. However, the photonic devices are large compared to electronic devices, and thus the two types of devices would ideally exist on separate levels of the microprocessor stack in order to maximize the amount of silicon substrate available for electronic device fabrication.A CMOS-compatible back-end process for the fabrication of photonic devices is necessary to realize such a three-dimensional EPIC. Back-end processing is limited in thermal budget and does not present a single-crystal substrate for epitaxial growth, however, so high-quality crystal fabrication methods currently used for photonic device fabrication are not possible in back-end processing.This thesis presents a method for the fabrication of high-quality germanium single crystals using CMOS-compatible back-end processing. Initial work on the ultra-high vacuum chemical vapor deposition of polycrystalline germanium on amorphous silicon is presented. The deposition can be successfully performed by using a pre-growth hydrofluoric acid dip and by limiting the thickness of the amorphous silicon layer to less than 120 nm. Films deposited at temperatures of 3500 C, 450* C, and 5500 C show (110) texture, though the texture is most prevalent in growths at 450* C. Poly-Ge grown at 4500 C is successfully doped n-type in situ, and the grain size of as-grown material is enhanced by lateral growth over a barrier.Structures are fabricated for the growth of Ge confined in one dimension. The growths show faceting across large areas, in contrast to as-deposited poly-Ge, corresponding to enhanced grain sizes. Growth confinement is shown to reduce the defect density as the poly-Ge grows. When coalesced into a continuous film, the material grown from 1 D confinement exhibits a lower carrier density and lower trap density than asdeposited poly-Ge, indicating improved material quality. We measure an increased grain size from as-deposited poly-Ge to Ge grown from ID confinement.Single-crystal germanium is grown at 450' C from confinement in two dimensions. Such growths exhibit faceting across the entire crystal as well as the presence of E3 boundaries ({ I 1} twins), with many growths showing no other boundaries. These twins mediate the growth of the crystal, as they serve as the points for heterogeneous surface nucleation of adatom clusters. The twins can form after the crystal nucleates and...

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“…by chemical vapor deposition (CVD) or physical vapor deposition (PVD). Crystallization is performed in an additional annealing step, where heat can be entered by a conventional furnace [2]- [3], by a laser, or by an electron beam [4]- [6]. This leads to grains with dimensions on the micrometer or submicrometer scale.…”

Section: Introductionmentioning

confidence: 99%

Solvent-induced growth of crystalline silicon on glass

Heimburger

Bansen

Markurt

et al. 2012

2012 38th IEEE Photovoltaic Specialists Conference

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We present the experimental setup and results of a two-step process for the deposition of large-grained silicon on glass, which has been developed at Leibniz Institute for Crystal Growth. In the first step, amorphous silicon films are crystallized at temperatures slightly above 300°C. To grow at such a low temperature and to speed-up the process, we use a special version of metal-induced crystallization, where the metal, here indium, is liquid and acts as a solvent. Contact of the metal with amorphous silicon is shown to lead to an in-plane movement of the liquid metal droplets, which is accompanied by precipitation of crystalline silicon. In analogy to the vapor-liquid-solid (VLS) process, we call this process amorphous-liquid-crystalline (ALC) transition. It will be shown, that this transition can be used to achieve full coverage of the substrate with a crystalline seeding layer. These seeding layers are used as templates for further silicon deposition using steady-state solution growth. This technique is derived from liquid phase epitaxy (LPE), but in contrast to classical LPE, supersaturation is not initiated by decreasing the temperature but by a stationary temperature difference between source and substrate leading to steady delivery of supersaturated solvent. It is shown, that this technique is applicable to obtain silicon crystallites with dimension of up to 50 µm within 4 hours. TEM analysis reveales the crystalline structure of the seeding layer and helps to understand the growth process.

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Electrical transport in laser-crystallized polycrystalline silicon-germanium thin-films

Cited by 14 publications

References 15 publications

Insertion of Zn atoms into Cu3N lattice: Structural distortion and modification of electronic properties

Insertion of Zn atoms into Cu3N lattice: Structural distortion and modification of electronic properties

Single‐Crystal Germanium Growth on Amorphous Silicon

Solvent-induced growth of crystalline silicon on glass

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