Electrical properties of phosphorus-doped polycrystalline germanium formed by solid-phase and metal-induced crystallization

Jung, Hyun Wook; Jung, Woo Shik; Yu, Hyun Yong; Park, Jin‐Hong

doi:10.1016/j.jallcom.2013.02.023

Cited by 38 publications

(24 citation statements)

References 12 publications

(14 reference statements)

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“…Many crystallization techniques have been developed, including solid-phase crystallization (SPC) 14 – 16 , laser annealing 17 , 18 , chemical vapor deposition 19 , 20 , flash-lamp annealing 21 , the seed layer technique 22 , and metal-induced crystallization 23 – 25 . By using these techniques, Ge-TFTs have been fabricated on thermally oxidized Si 21 , 26 , 27 , glass 28 – 31 , and even flexible substrates 22 , 32 .…”

Section: Introductionmentioning

confidence: 99%

Improving carrier mobility of polycrystalline Ge by Sn doping

Moto

Yoshimine

Suemasu

et al. 2018

Sci Rep

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To improve the performance of electronic devices, extensive research efforts have recently focused on the effect of incorporating Sn into Ge. In the present work, we investigate how Sn composition x (0 ≤ x ≤ 0.12) and deposition temperature Td (50 ≤ Td ≤ 200 °C) of the Ge1−xSnx precursor affect subsequent solid-phase crystallization. Upon incorporating 3.2% Sn, which is slightly above the solubility limit of Sn in Ge, the crystal grain size increases and the grain-boundary barrier decreases, which increases the hole mobility from 80 to 250 cm2/V s. Furthermore, at Td = 125 °C, the hole mobility reaches 380 cm2/V s, which is tentatively attributed to the formation of a dense amorphous GeSn precursor. This is the highest hole mobility for semiconductor thin films on insulators formed below 500 °C. These results thus demonstrate the usefulness of Sn doping of polycrystalline Ge and the importance of temperature while incorporating Sn. These findings make it possible to fabricate advanced Ge-based devices including high-speed thin-film transistors.

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Section: Introductionmentioning

confidence: 99%

Improving carrier mobility of polycrystalline Ge by Sn doping

Moto

Yoshimine

Suemasu

et al. 2018

Sci Rep

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“…[4][5][6][7][8] The most promising usage of such high-performance Ge-CMOS is to integrate it into Si large-scale integrated circuits (LSIs) or flat-panel displays. To achieve this, low-temperature Ge-on-insulator (GOI) technology has been developed, including solid-phase crystallization (SPC), [9][10][11][12][13] laser annealing, [14][15][16][17][18] chemical vapor deposition, 19,20 flash-lamp annealing, 21 the seed layer technique, 22 and metal-induced crystallization. [23][24][25][26][27] Using the resulting polycrystalline (poly-) Ge layers, p/n-channel MOSFETs 12,13,17,21,27 and even CMOS operation have been successfully demonstrated.…”

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confidence: 99%

Sb-doped crystallization of densified precursor for n-type polycrystalline Ge on an insulator with high carrier mobility

Takahara

Moto

Imajo

et al. 2019

Applied Physics Letters

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Low-temperature synthesis of polycrystalline (poly-) Ge on insulators is a key technology to integrate Ge-CMOS into existing devices. However, Fermi level control in poly-Ge has been difficult because poly-Ge has remained naturally highly p-type due to its defect-induced acceptors. We investigated the formation of n-type poly-Ge (thickness: 100-500 nm) using the advanced solid-phase crystallization technique with Sb-doped densified precursors. Sb doping on the order of 10 20 cm À3 facilitated lateral growth rather than nucleation in Ge, resulting in large grains exceeding 15 lm at a low growth temperature (375 C). The subsequent heat treatment (500 C) provided the highest electron mobility (200 cm 2 /V s) and the lowest electron density (5 Â 10 17 cm À3) among n-type poly-Ge directly grown on insulators. These findings will provide a means for the monolithic integration of high-performance Ge-CMOS into Si-LSIs and flat-panel displays.

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“…For many years, Ge has been expected to be a channel material for TFTs owing to its high carrier mobility (electron: 3900 cm 2 V –1 s –1 , hole: 1900 cm 2 V –1 s –1 ) and relatively low crystallization temperature (∼500 °C). , Owing to the development of gate stack technology, − the performance of metal–oxide–semiconductor field-effect transistors (MOSFETs) based on a single-crystal (sc-) Ge-on-insulator structure, formed using an sc-wafer − and/or high-temperature process (>900 °C), , surpassed those of Si MOSFETs. To date, low-temperature syntheses of Ge layers have been achieved using various techniques, such as solid-phase crystallization (SPC), − laser annealing, − chemical vapor deposition, , seed layer technique, lamp annealing, , and metal-induced layer exchange. − However, most polycrystalline (poly-) Ge is poorly crystalline, consisting of small grains, owing to the low nucleation energy . This property limits the performance of Ge-TFTs. ,,− …”

Section: Introductionmentioning

confidence: 99%

Three-Dimensionally Orientation-Controlled Ge Rods on an Insulator Formed by Low-Temperature Ni-Induced Lateral Crystallization

Ishiyama

Imajo

Saitoh³

et al. 2022

Crystal Growth & Design

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The carrier mobility of polycrystalline Ge(Sn) thin films has been updated significantly in recent years owing to the modulation of amorphous precursors in solidphase crystallization. However, uncontrolled grain boundaries and crystal orientations are major problems associated with thin-film transistor (TFT) applications. To overcome these problems, we investigated the effects of amorphous Ge(Sn) precursors on metalinduced lateral crystallization using a Ni catalyst. In situ optical microscopy and Raman spectroscopy revealed that the densification of amorphous Ge promotes lateral crystallization by increasing the frequency factor rather than by reducing the activation energy. Low-temperature annealing at 325 °C allowed for the synthesis of large Ge rods (10 μm length, 2 μm width), which were Ni-free according to an energy-dispersive X-ray spectrometer. Furthermore, electron beam backscattering diffraction and transmission electron microscopy analyses revealed that the Ge rods grew in the ⟨110⟩ direction from the Ni pattern and were oriented in the {110} plane in the normal direction, resulting in the {100} orientation in the longitudinal sides of the Ge rods. Thus, we have developed three-dimensionally orientation-controlled Ge rods on insulators at low temperatures. This achievement will pave the way for TFTs with a stable and high-performance operation, enabling the development of advanced flexible devices.

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Electrical properties of phosphorus-doped polycrystalline germanium formed by solid-phase and metal-induced crystallization

Cited by 38 publications

References 12 publications

Improving carrier mobility of polycrystalline Ge by Sn doping

Improving carrier mobility of polycrystalline Ge by Sn doping

Sb-doped crystallization of densified precursor for n-type polycrystalline Ge on an insulator with high carrier mobility

Three-Dimensionally Orientation-Controlled Ge Rods on an Insulator Formed by Low-Temperature Ni-Induced Lateral Crystallization

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