Electrical Properties of Paraelectric (Pb _0.72La _0.28)TiO₃ Thin Films with High Linear Dielectric Permittivity: Schottky and Ohmic Contacts

Abstract

Linear, paraelectric (Pb0.72La0.28)TiO3 or PLT(28) thin films with a bandgap>3 eV were deposited on Pt/Ti/SiO2/Si substrates by the sol-gel technique. Specific top-contact metals from two distinct groups (i.e., non-noble or M T and noble or M N; the former being oxidizable transition metals) were selected to understand the electrical nature of the interfaces in terms of electrode dependent energy band diagrams and equivalent circuit models. Using a high sensitivity high-pass filter circuit to evaluate the charging and discharging behavior coupled with results of the thickness and voltage dependence of capacitance, it was determined that M T ( Ni,Cr,Ti) and M N ( Pt,Au,Ag) metals form Ohmic and Schottky contacts, respectively. Supported by thermochemical data and calculations, the ohmic M T- PLT interfaces are envisioned to be of the form: M T-M T O x -n + PLT-n PLT. In contrast, the M N- PLT interfaces may be characterized by a metal work function independent Schottky diode; the surface Fermi level being pinned at the mid-gap. For example, a Schottky barrier height of 1.83 eV and a built-in voltage of 1.3 eV at the Pt-PLT interface were estimated. From low field capacitance measurements, the ratio of interfacial to bulk resistance, R i/R b, was estimated to be 23.

A possible mechanism of anomalous shift and asymmetric hysteresis behavior of ferroelectric thin films

“…A most notable phenomenon is the large voltage offset along the horizontal ͑electric field͒ axis found in the hysteresis loop measurements. [1][2][3][4][5][6][7][8][9][10][11] The result is a deformed hysteresis loop with asymmetric switching. 6 Many researchers attributed the shift effect to the internal field caused by trapped charge carriers.…”

“…6 Many researchers attributed the shift effect to the internal field caused by trapped charge carriers. [1][2][3][4] Other explanations included domain pinning, 5,6 rectifying effects formed at the ferroelectric-electrode interface [7][8][9] and the effect of passive layers. [10][11][12] It seems that the definitive mechanism is still not fully understood and the voltage shift may arise from multiple sources.…”

Modeling of anomalous shift and asymmetric hysteresis behavior of ferroelectric thin films

“…One of the most notable phenomenon is the large voltage offset along the horizontal (electric-field) axis found in the hysteresis loop measurements. [1][2][3][4][5][6][7][8][9][10][11] The result is a deformed hysteresis loop with asymmetric switching. 6 Many researchers attributed the shift effect to the internal field caused by trapped charge carriers.…”

“…6 Many researchers attributed the shift effect to the internal field caused by trapped charge carriers. [1][2][3][4] Other explanations included domain pinning, 5,6 rectifying effects formed at the ferroelectric-electrode interface, [7][8][9] and the effect of passive layers. [10][11][12] It seems that there is no general agreement on a definitive mechanism and that the voltage shift may possibly arise from multiple sources.…”

“…[16][17][18] This mechanism leading to asymmetric leakage current has long been observed and discussed in literature. [7][8][9]19,20 The accumulated interfacial charge will allow the buildup of an internal bias field to displace the hysteresis loop from the origin.…”