“…The distributed multiple-cell order to obtain a 0.3 µm part (a) by multiple reflections. Similarly to the simulation problem [297,298], in the numerical experiments the numerical fluctuations enabled transient solutions with stable spatially nonuniform current distribution realized in casual location across the structure width. In ordinates in a different part of the device during the ESD stress indicate the splittemperature exhibits current stratification and the formation of solitary hot spot.…”
Section: Spatial Thermal Runaway In Esd Devicesmentioning
“…The distributed multiple-cell order to obtain a 0.3 µm part (a) by multiple reflections. Similarly to the simulation problem [297,298], in the numerical experiments the numerical fluctuations enabled transient solutions with stable spatially nonuniform current distribution realized in casual location across the structure width. In ordinates in a different part of the device during the ESD stress indicate the splittemperature exhibits current stratification and the formation of solitary hot spot.…”
Section: Spatial Thermal Runaway In Esd Devicesmentioning
“…When a MOSFET undergoes an ESD, a strong current is flowing during a few nanoseconds, which causes an important and local rise of temperature and various kinds of failures in the transistor structure [15], [16]:…”
Section: Electrical Characterization 3 Reliability and Physical Analymentioning
This paper proposes a methodology to study the reliability and failure analysis of new technologies of power transistors. The use of wide gap materials such as Silicon Carbide (SiC) and Gallium Nitride (GaN) is now a good alternative to meet the integration requirements of energy conversion systems. However, the reliability of these components is a crucial issue. Aging in operating conditions is considered, associated with electrical measurements to highlight nondestructive degradations of the performance of studied transistors. A step of looking for failure mechanisms in the material is made in order to identify any physical degradation. The information collected provide the user with valuable data and help to make an optimum choice of the component which can be integrated into the equipment. The presented work proposes the description of a methodology that meets these requirements and shows the study of two technologies of power transistors used in new generations of power converters.
“…The principal physical mechanism of the conductivity modulation is different for both types of structures. Simple analysis of the electric field and carrier density depth profiles demonstrates that the snapback operation of NPN BJT involves avalanche-injection conductivity modulation [4,5] that realizes the positive feedback between the avalanche multiplication in the collector junction and subsequent electric field reconstruction [6]. The following holding voltage in high conductivity state is determined by the level of the carrier mutual space charge neutralization, i.e.…”
Section: Structure Technology Cad and Operationmentioning
confidence: 99%
“…This graph compares ESD pulse operation of the BJT and DIAC structure obtained by mixed-mode thermal coupled transient simulation. The waveforms of clamp voltage and maximum lattice temperature for the BJT and DIAC demonstrate significant differences in extracted maximum lattice temperature inside the device that can be indirectly linked to catastrophic failure events due to filamention and hot spot formation non-linear effects [4].…”
Section: Structure Technology Cad and Operationmentioning
Triggering structures BJT, SCR and bidirectional SCR for high voltage BiCMOS process onchip ESD protection have been developed and analyzed using physical process and device simulation and pulse measurements. A ten-fold increase in the protection levels compared to the reference BJT structures have been demonstrated using a cylindrical lateral SCR and bidirectional SCR.
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