Electrical characterization, metallurgical investigation, and thermal stability studies of (Pd, Ti, Au)-based ohmic contacts

Abstract

Although Pd/Ti/Pd/Au contacts are similar to their Pt/Ti/Pt/Au counterparts in providing low specific contact resistance, ρc, the former exhibits long-term thermal stability. Their projected mean times to 50% increase in ρc(μ50) at 150 °C to p+-GaAs (⩾3.43×1015 h) are higher than those of the latter by over five orders of magnitude. Contacts to p+-In0.53Ga0.47As are not as thermally stable, with a much lower albeit respectable μ50 at 150 °C of ⩾2.25×105 h. Contacts with an interfacial Pd layer provide ρc’s that are at least two times lower than those without, and the presence of an oxide layer (GaxTiyOz) at the Ti/GaAs interface is identified as a possible cause. Pd–Ga–As phases are formed at the Pd/GaAs interface, being As-rich (PdxGayAs) initially and convert to Ga-rich phases (PduGavAs) upon a high temperature anneal and the eventual composition depends on the evaporated interfacial Pd thickness and annealing conditions. This could probably explain the existence of an optimum interfacial Pd layer thickness of 100 Å for achieving the lowest ρc. The Ga-rich PduGavAs phases formed are inferred to cause the liberation of As atoms from the GaAs lattice, thus enabling them to diffuse out to the Ti and react to form TixAsy phases that bind the As from further out-diffusion. This has in turn led to the accumulation of As at the Pd/Ti interface.

Characterization of low-resistance ohmic contacts to n- and p-type InGaAs

“…14 Prior to metallization, the InGaAs surface was prepared using an ultraviolet (UV)-ozone exposure followed by treatment with HCl. Palladium has also been used in contacts with low resistances, 6,16,20,21 as a uniform Pd x InGaAs phase 22 forms readily at low temperatures (<300 C), and Pd can uniformly penetrate the native oxide. 23 Similarly, increased doping, optimized surface treatments, and favorable contact metal selection lowers the specific contact resistance of non-alloyed contacts to p-InGaAs.…”

“…Pd/Ti/Pd/ Au contacts to p-InGaAs (N A ¼ 1 Â 10 19 cm À3 ) consistently resulted in the lowest specific contact resistance compared with Ti/Pt/Au ($2 times higher) contacts with NH 4 OH surface preparation. 16,21 When a Pd or Pt contacting layer was introduced below the Ti/Pt/Au contact to p-InGaAs (N A ¼ 1À2 Â 10 19 cm À3 ) prepared with a buffered oxide etch (BOE) surface treatment, the specific contact resistance decreased by about 2 times. 27 A similar effect occurred for Ir/ Au contacts to p-InGaAs (N A ¼ 1 Â 10 19 cm À3 ).…”

“…Non-alloyed contacts to p-In 0:53 Ga 0:47 As with doping concentrations of 1-2 Â 10 19 cm À3 generally result in specific contact resistances on the order of 10 À6 X-cm 2 or higher, depending on the surface preparation and metallization used. 16,21,[24][25][26][27][28][29] Recently, specific contact resistances on the order of 10 À8 to 10 À9 X-cm 2 have been demonstrated for Ir- 30 and W-based 31 contacts to p-In 0:53 Ga 0:47 As with measured carrier concentrations from 1-2 Â 10 20 cm À3 using UV-ozone and HCl for the semiconductor surface preparation. Pd/Ti/Pd/ Au contacts to p-InGaAs (N A ¼ 1 Â 10 19 cm À3 ) consistently resulted in the lowest specific contact resistance compared with Ti/Pt/Au ($2 times higher) contacts with NH 4 OH surface preparation.…”

Application of advanced thin film technologies to the manufacture of multijunction solar cells

“…With this purpose, two interfacial metal layers, namely, Pd and PdGe, have been explored. The interest of Pd stems from the fact that it would not add significant complexity to the system (since it is already used as part of the diffusion barrier) and, as reported by E.F.Chor et al [31], a Pd interfacial layer allows achieving a low ρ c to GaAs. The reason given by E.F.Chor et al [31] for this low ρ c was the absence of oxide on the metalsemiconductor interface caused by Pd penetrating native oxides and dispersing them uniformly and the formation of PdGaAs phases as described section 4.1.…”

“…The interest of Pd stems from the fact that it would not add significant complexity to the system (since it is already used as part of the diffusion barrier) and, as reported by E.F.Chor et al [31], a Pd interfacial layer allows achieving a low ρ c to GaAs. The reason given by E.F.Chor et al [31] for this low ρ c was the absence of oxide on the metalsemiconductor interface caused by Pd penetrating native oxides and dispersing them uniformly and the formation of PdGaAs phases as described section 4.1. On the other hand, introducing a PdGe interfacial bilayer would increase moderately the Chapter 4 Development of new metallizations on n-type GaAs for high current density devices complexity of the system (a new element, namely Germanium, is added) but, as discussed above, the merits associated to the solid phase regrowth process would be achieved producing a much lower metal-semiconductor specific contact resistance.…”