Electrical characteristics of CoSi2/n-Si(100) Schottky barrier contacts formed by solid state reaction

The distribution of barrier heights in MIS type Schottky diodes from current–voltage–temperature (I–V–T) measurements

“…To explain the commonly observed abnormal deviation from classical TE theory, some authors [9,27,34,35] have considered a system of discrete regions or patches of low barrier imbedded in a higher background uniform barrier. This abnormal behavior can be explained by assuming a GD of the BH with a mean value¯B 0 and standard deviation s , which can be given as [9,13,14,27,[36][37][38][39] …”

“…As was reported in Refs. [13,14,26,32,35], barrier inhomogeneities can occur as a result of inhomogeneities in the composition of the interfacial insulator layer. The standard deviation is a measure of the barrier inhomogeneity.…”

Examination by interfacial layer and inhomogeneous barrier height model of temperature-dependent I–V characteristics in Co/p-InP contacts

“…Such a temperature-dependent behavior of the SBH and the ideality factor or deviation from the classical TE theory is commonly observed in real SBDs. The deviation from the TE theory as a function of the measurement temperature may be due to the spatially inhomogeneous BHs and potential fluctuations at the interface that consist of low and high barrier areas [11][12][13][14][15][16][17][18][19][20][21][22][23][24][25], that is, the current through the diode will flow preferentially through the lower barriers in the potential distribution [13][14][15][16][17]. Osvald and Dobrocka [12], Song et al [14] and Chand and Kumar [17] have indicated that the barrier inhomogeneities can occur as a result of inhomogeneities in the interfacial oxide layer composition, non-homogeneous of the interfacial charges and interfacial oxide layer thickness.…”

“…As explained in Refs. [12,[21][22][23][24][25], since current transport across the MS interface is a temperature activated process, electrons at low temperatures are able to surmount the lower barriers and therefore current transport will be dominated by current flowing through the patches of lower SBH and a larger ideality factor. As the temperature increases, the dominant BH will increase with the temperature and bias voltage.…”

“…Moreover, analysis of the I-V characteristics of the SBDs at room temperature does not give detailed information about their conduction process or the nature of barrier formation at the MS interface. The temperature dependence of the I-V characteristics allows us to understand different aspects of conduction mechanisms [21][22][23][24][25][26][27][28][29][30][31].…”