Electrical and Reliability Investigation of Cu TSVs With Low-Temperature Cu/Sn and BCB Hybrid Bond Scheme

Chang, Yia‐Chung; Ko, Cheng-Ta; Chen, Kuan‐Neng

doi:10.1109/led.2012.2225136

Cited by 28 publications

(12 citation statements)

References 11 publications

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“…This is highly desirable for bonding multiple chip layers, because it avoids de-bonding of the first and the second layers when bonding of the third layer is implemented. Eutectic bonding has been used to produce hermetic packages for MEMS [169], [170] and electrical interconnects between two layers for 3-D integration [171]- [176]. The liquid state of the eutectic metal can relax restrictions on wafer uniformity and roughness, as well as TSV "microbump" uniformity and roughness, but it can also cause wafer shift and deteriorate alignment accuracy.…”

Section: ) Emerging Materials and Methodsmentioning

confidence: 99%

3-D Integration and Through-Silicon Vias in MEMS and Microsensors

Wang

2015

J. Microelectromech. Syst.

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After two decades of intensive development, 3-D integration has proven invaluable for allowing integrated circuits to adhere to Moore's Law without needing to continuously shrink feature sizes. The 3-D integration is also an enabling technology for hetero-integration of microelectromechanical systems (MEMS)/microsensors with different technologies, such as CMOS and optoelectronics. This 3-D heterointegration allows for the development of highly integrated multifunctional microsystems with small footprints, low cost, and high performance demanded by emerging applications. This paper reviews the following aspects of the MEMS/ microsensor-centered 3-D integration: fabrication technologies and processes, processing considerations and strategies for 3-D integration, integrated device configurations and wafer-level packaging, and applications and commercial MEMS/ microsensor products using 3-D integration technologies. Of particular interest throughout this paper is the heterointegration of the MEMS and CMOS technologies. [2015-0158]Index Terms-Three-dimensional (3-D) integration, microelectromechanical systems (MEMS), microsensor, packaging, hetero-integration, interposer, through-silicon-via (TSV), waferlevel packaging, microsystem.

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Section: ) Emerging Materials and Methodsmentioning

confidence: 99%

3-D Integration and Through-Silicon Vias in MEMS and Microsensors

Wang

2015

J. Microelectromech. Syst.

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“…4 show the measured specific contact resistance after 1000 thermal cycling loop treatments, indicating that the bonded interconnects could withstand large temperature variation without failure. Besides, the reduction of resistance was found in the case of Ti passivation, and the reason may come from the quality improvement of bonding interface during TCT [11].…”

Section: Evaluation Of Bonded Structures and Electrical Measurementmentioning

confidence: 99%

Demonstration and Electrical Performance of Cu–Cu Bonding at 150 °C With Pd Passivation

Huang

Chien

Tzeng

et al. 2015

IEEE Trans. Electron Devices

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In this paper, one low-temperature direct Cu bonding structure is demonstrated using metal passivated layers. With the protection of Cu bonding layer, the bonding temperature can be reduced to meet low thermal budget requirement. Direct wafer-level Cu bond scheme with Pd passivation is successfully demonstrated at 150°C. Electrical performance along with the material analysis and reliability tests of passivated Cu bonded structures is presented. Furthermore, reliability assessments, including current stressing, temperature cycling, and unbiased highly accelerated stress test, imply excellent stability without electrical degradation. Diffusion behavior between passivation Pd and Cu layers is surveyed, and the corresponding mechanism is discussed as well. The low-temperature Cu/Pd-Pd/Cu bonded structure presents good bond quality and electrical performance, indicating a great potential for 3-D integration applications. Index Terms-3-D integration, Cu bonding, passivation.0018-9383

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“…The three-dimensional (3D) integration technology is well known as one of the most promising approaches to extend and even beyond "Moore's law", since it can provide the advantages, such as lower power consumption, higher bandwidth, and lager integration [1][2][3][4][5]. It is one important requirement for the bonding material and process in 3D integration applications that the stacking of additional layers without remelting the solder joints at lower levels of the stack should be repeated.…”

Section: Introductionmentioning

confidence: 99%

“…Yaojen Chang et al [4]demonstrated that the Cu/Sn-BCB hybrid joints could be obtained below 250 . However, the bonding time was about 30 minutes, which was timeconsuming.…”

Section: Introductionmentioning

confidence: 99%

Rapid formation of Cu-Sn intermetallic compounds by strong electric current

Liu

Tian

Wang

et al. 2014

2014 Joint IEEE International Symposium on the Applications of Ferroelectric, International Workshop on Acoustic Transduction M

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A new approach of rapid fabrication of intermetallic compounds (IMCs) solder joints at ambient temperature was investigated in this work. The high share strength Cu/Sn/Cu solder joints were obtained by using different strong electric currents 0.8KA, 0.9KA, 1.0KA, and 1.2KA for only about 0.2s. The Sn foils with the thickness of 10 m were used as solders. The results showed that with the current intensities increasing from 0.8KA to 1.2KA, the thickness of IMCs, Cu 6 Sn 5 , increased from less than 1 m to 4.2 m for 0.2s, which was induced by thermoelectric coupling interfacial interaction at the liquid solder/solid metallization interface. In addition, amount of dendritic Cu 6 Sn 5 distributed in the Sn matrix at the bottom right corner of solder joint under the current intensity of 1.2KA, which was caused by the current crowding effects. Lastly, the share strengths of Cu/Sn/Cu solder joints under the rapid bonding process were improved with the bonding current increasing. The share strength was up to 51.9MPa at 1.2KA.

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Electrical and Reliability Investigation of Cu TSVs With Low-Temperature Cu/Sn and BCB Hybrid Bond Scheme

Cited by 28 publications

References 11 publications

3-D Integration and Through-Silicon Vias in MEMS and Microsensors

3-D Integration and Through-Silicon Vias in MEMS and Microsensors

Demonstration and Electrical Performance of Cu–Cu Bonding at 150 °C With Pd Passivation

Rapid formation of Cu-Sn intermetallic compounds by strong electric current

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