2017
DOI: 10.1007/s11664-017-5750-z
|View full text |Cite
|
Sign up to set email alerts
|

Electric Circuit Model Analogy for Equilibrium Lattice Relaxation in Semiconductor Heterostructures

Abstract: The design and analysis of semiconductor strained-layer device structures require an understanding of the equilibrium profiles of strain and dislocations associated with mismatched epitaxy. Although it has been shown that the equilibrium configuration for a general semiconductor strained-layer structure may be found numerically by energy minimization using an appropriate partitioning of the structure into sublayers, such an approach is computationally intense and non-intuitive. We have therefore developed a si… Show more

Help me understand this report

Search citation statements

Order By: Relevance

Paper Sections

Select...

Citation Types

0
0
0

Publication Types

Select...

Relationship

0
0

Authors

Journals

citations
Cited by 0 publications
references
References 27 publications
(41 reference statements)
0
0
0
Order By: Relevance

No citations

Set email alert for when this publication receives citations?