Efficient modelling and simulation of embedded software multi-tasking using SystemC and OSSS

Hartmann, Philipp A.; Kleen, Henning; Reinkemeier, Philipp; Nebel, Wolfgang

doi:10.1109/fdl.2008.4641415

Cited by 6 publications

(8 citation statements)

References 9 publications

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“…In paper [6] authors suggest a lazy syncronization scheme. It is based on ommitting SystemC time syncronization when it does not have an observable effect on the model.…”

Section: Related Workmentioning

confidence: 99%

Automatic transformation of SystemC designs to speed up simulation

Petrov

Gagarski

Moiseev

2015

2015 IEEE East-West Design &Amp; Test Symposium (EWDTS)

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SystemC language is widely used for hardware design and verification. Simulation of large SystemC designs may be quite time-consuming, that limits its applicability, especially in virtual platforms. In this paper we propose an approach to speed up simulation of synthesizable SystemC designs. The approach is based on automatic transformation of the design to equivalent one with event-based synchronization, which simulation is much faster. Our approach is implemented in the SCAccel tool and a SystemC kernel patch, which are available to download. The evaluation results for a real world system-on-chip show performance boost 1.6...41 times, depends on testbench and system configuration.

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“…In paper [6] authors suggest a lazy syncronization scheme. It is based on ommitting SystemC time syncronization when it does not have an observable effect on the model.…”

Section: Related Workmentioning

confidence: 99%

Automatic transformation of SystemC designs to speed up simulation

Petrov

Gagarski

Moiseev

2015

2015 IEEE East-West Design &Amp; Test Symposium (EWDTS)

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“…Just recently, an extension deploying techniques with respect to preemptive scheduling models very similar to the ones presented in this work has been presented in [19]. The "Result Oriented Modelling" collects and consumes consecutive timing annotations while still handling preemptions accurately similar to our "lazy synchronisation" scheme presented in [8].…”

Section: Related Workmentioning

confidence: 99%

Distributed Resource-Aware Scheduling for Multi-core Architectures with SystemC

Hartmann

Grüttner

Rettberg

et al. 2010

Distributed, Parallel and Biologically Inspired Systems

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Abstract. With the rise of multi-core platforms even more complex software systems can be implemented. Designers are facing various new challenges during the development of efficient, predictable, and correct applications for such platforms. To efficiently map software applications to these architectures, the impact of platform decisions with respect to the hardware and the software infrastructure (OS, scheduling policies, priorities, mapping) has to be explored in early design phases.Especially shared resource accesses are critical in that regard. The efficient mapping of tasks to processor cores and their local scheduling are increasingly difficult on multi-core architectures. In this work we present an integration of shared resources into a SystemC-based simulation framework, which enables early functional simulation and provides a refinement flow towards an implementation, covering an increasing level of platform details. We propose shared resource extensions towards multicore platform models and discuss which aspects of the system behaviour can be captured.

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“…In [19] an extension, deploying techniques with respect to preemptive scheduling models, very similar to the ones presented in this work has been presented. The "Result Oriented Modelling" collects and consumes consecutive timing annotations while still handling preemptions accurately, similar to the "lazy synchronisation" scheme presented in [10]. Just recently, an extension towards multi-core architectures has been presented in [16], although inter-task communication has not yet been addressed.…”

Section: Introductionmentioning

confidence: 97%

“…Just recently, an extension towards multi-core architectures has been presented in [16], although inter-task communication has not yet been addressed. Further existing approaches are presented in [10].…”

Section: Introductionmentioning

confidence: 99%

Challenges of multi- and many-core architectures for electronic system-level design

Grüttner

Hartmann

Reinkemeier

et al. 2011

2011 International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation

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In today's design of embedded systems the software part is increasingly important. Over the last years we have observed a shift from hardware to software added value. With the rise of multi-and many-core platforms even more complex software systems can be implemented. To efficiently map software applications to such architectures, the impact of platform decisions with respect to the hardware and the software infrastructure (OS, scheduling policies, priorities, mapping) has to be explored in early design phases.In this work, we discuss the challenges of the multi-and many-core design-space. We give an overview of our existing SystemC TM -based OSSS design flow including software multitasking in system-level models. We propose extensions towards multi-and many-core platform models and discuss which aspects of the system behaviour can be captured. Since this is work in progress we end up with challenges which have not been solved until now and propose new concepts to overcome the current limitations.

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Efficient modelling and simulation of embedded software multi-tasking using SystemC and OSSS

Cited by 6 publications

References 9 publications

Automatic transformation of SystemC designs to speed up simulation

Automatic transformation of SystemC designs to speed up simulation

Distributed Resource-Aware Scheduling for Multi-core Architectures with SystemC

Challenges of multi- and many-core architectures for electronic system-level design

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