Efficient Mode Decision Schemes for HEVC Inter Prediction

Vanne, Jarno; Viitanen, Marko; Hämäläinen, Timo D.

doi:10.1109/tcsvt.2014.2308453

Cited by 128 publications

(65 citation statements)

References 11 publications

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“…Fast prediction unit decision methods are proposed in [17], [18], [24], [34]. Motion Estimation is performed only on the selected inter prediction mode in [17] based on a priority level.…”

Section: Related Workmentioning

confidence: 99%

“…Spatio-temporal analysis and depth correlations along with a classification of motion activity are explored in [18]. In [34], optimization techniques are proposed based on the rate-distortion-complexity characteristics of the HEVC inter prediction for the different block partitioning structures. In [24], the depth information of a CTU is already determined from information collected in the 2N × 2N PU.…”

Section: Related Workmentioning

confidence: 99%

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Inter Prediction Complexity Reduction for HEVC based on Residuals Characteristics

Saurty¹,

Cartigny²,

Krishnaraj³

2016

ijacsa

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Abstract-High Efficiency Video Coding (HEVC) or H.265 is currently the latest standard in video coding. While this new standard promises improved performance over the previous H.264/AVC standard, the complexity has drastically increased due to the various new improved tools added. The splitting of the 64×64 Largest Coding Unit (LCU) into smaller CU sizes forming a quad tree structure involves a significant number of operations and comparisons which imposes a high computational burden on the encoder. In addition, the improved Motion Estimation (ME) techniques used in HEVC inter prediction in order to ensure greater compression also contribute to the high encoding time. In this paper, a set of standard thresholds are identified based on the Mean Square (MS) of the residuals. These thresholds are used to terminate the CU splitting process and to skip some of the inter modes processing. In addition, CUs with large MS values are split at a very early stage. Experimental results show that the proposed method can effectively reduce the encoding time by 62.2% (70.8% for ME) on average, compared to HM 10, yielding a BD-Rate of only 1.14%.

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“…Fast prediction unit decision methods are proposed in [17], [18], [24], [34]. Motion Estimation is performed only on the selected inter prediction mode in [17] based on a priority level.…”

Section: Related Workmentioning

confidence: 99%

Section: Related Workmentioning

confidence: 99%

Inter Prediction Complexity Reduction for HEVC based on Residuals Characteristics

Saurty¹,

Cartigny²,

Krishnaraj³

2016

ijacsa

View full text Add to dashboard Cite

show abstract

“…Square motion partition (Square) mode and symmetric motion partition (SMP) mode are adopted from H.264/MPEG-4 AVC to meet large sizes of CBs in HEVC. Asymmetric motion partition (AMP) mode is introduced to present irregular object boundaries with fewer bits than Square and SMP modes [7]. The supported modes include two Square modes (PART_2Nx2N and PART_NxN), two SMP modes (PART_Nx2N and PART_2NxN) and four AMP modes (PART_2NxnU, PART_2NxnD, PART_nLx2N, and PART_nRx2N) where, n represents smaller one of the partitions which equals to N/2, and U, D, L, and R denote up, down, left, and right, respectively [7].…”

Section: Hevc Motion Estimation Theorymentioning

confidence: 99%

A highly parallel SAD architecture for motion estimation in HEVC encoder

Medhat

Shalaby

Sayed

et al. 2014

2014 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS)

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Abstract-The high computational cost of the motion estimation module in the new HEVC standard raises the need for efficient hardware architectures that can meet the real-time processing constraint. In addition, targeting HD and UHD resolutions increases the motion estimation processing cost beyond the capabilities of the currently existing architectures. This paper presents a highly parallel sum of absolute difference (SAD) architecture for motion estimation in HEVC encoder. The proposed architecture has 64 PUs operating in parallel to calculate the SAD values of the prediction blocks. It processes block sizes from 4x4 up to 64x64. The proposed architecture has been prototyped, simulated and synthesized on Xilinx Virtix-7 XC7VX550T FPGA. At 458 MHz clock frequency, the proposed architecture processes 30 2K resolution fps with ±20 pixels search range. The prototyped architecture utilizes 7% of the LUTs and 5% of the slice registers in Xilinx Virtex-7 XC7VX550T FPGA.

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“…This search method speedup coding time by reducing search points due to the minimum rate-distortion cost frequently around AMVP. Besides, some stage-of-the-art ME algorithms (5,6) for HEVC in the literature are proposed and demonstrated the outstanding coding efficiency.…”

Section: Introductionmentioning

confidence: 99%

A Bandwidth-Adjustable Motion Estimation Design for Portable Video Coding

Hsieh

Hung

Wang

2016

Proceedings of the 4th IIAE International Conference on Intelligent Systems and Image Processing 2016

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Motion estimation (ME) is the most computation-and power-demanding module of portable video coding owing to the numerous calculations of rate-distortion (R-D) optimization operation and a large number of frame memory access. Nevertheless, how to minimize the power consumption of this component is the main research topic with regard to the H.264/AVC video coding standard. More severe problems arose in the latest video coding standard, called high-efficiency video coding (HEVC) because of the more R-D calculations and frame data access owing to utilization of larger block sizes and numerous block partitions for better coding bit-rate reduction than H.264/AVC. Accordingly, in this paper, we introduce a bandwidth-adjustable ME design, which is capability of not only awareness of bus bandwidth change but lower memory access times. Compared with the HEVC test model (HM-16.6), the proposed algorithm can save memory access under the common test conditions with negligible rate-distortion degradation.

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Efficient Mode Decision Schemes for HEVC Inter Prediction

Cited by 128 publications

References 11 publications

Inter Prediction Complexity Reduction for HEVC based on Residuals Characteristics

Inter Prediction Complexity Reduction for HEVC based on Residuals Characteristics

A highly parallel SAD architecture for motion estimation in HEVC encoder

A Bandwidth-Adjustable Motion Estimation Design for Portable Video Coding

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