Efficient Memristor-Based Architecture for Intrusion Detection and High-Speed Packet Classification

Abstract

Deep packet inspection (DPI) is a critical component to prevent intrusion detection. This requires a detailed analysis of each network packet header and body. Although this is often done on dedicated high-power servers in most networked systems, mobile systems could potentially be vulnerable to attack if utilized on an unprotected network. In this case, having DPI hardware on the mobile system would be highly beneficial. Unfortunately, DPI hardware is generally area and power consuming, making its implementation difficult in mobile systems. We developed a memristor crossbar-based approach, inspired by memristor crossbar neuromorphic circuits, for a low-power, low-area, and high-throughput DPI system that examines both the header and body of a packet. Two key types of circuits are presented: static pattern matching and regular expression circuits. This system is able to reduce execution time and power consumption due to its high-density grid and massive parallelism. Independent searches are performed using low-power memristor crossbar arrays giving rise to a throughput of 160Gbps with no loss in the classification accuracy.

On Memristors for Enabling Energy Efficient and Enhanced Cognitive Network Functions

“…Memristor-based crossbar neuromorphic circuit is specially useful for achieving application specific tasks like Deep Packet Inspection (DPI) on mobile devices requiring area, power and throughput efficiency. Bontupalli et al [78] presented two types of crossbar array neuromorphic circuits for static pattern matching and regular expression circuits. The study showed that throughput up to 160 Gbps can be achieved through memristor-based crossbar array architectures with greater accuracy and lower latency.…”

“…Traditional neuromorphic architectures [103] Synaptic properties [101-102] Neuromorphic architecture design [104] Cognitive architecture design [105] Memristors for neuromorphic chips [116] Anomaly detection [113] Crossbar neuromorphic architecture [78] Hybrid neuromorphic architectures [107] Novel memristors for neurormophic arch. [115] Learning based attack prevention [112] Neuromorphic memristor modeling [111] Secure crossbar architecture [79] TCAM as coprocessor [61] Complex pattern recognition [58] Energy efficient hierarchical TCAM [41] Hierarchical routing table [42] Two-tier prefix matching [43] SRAM-based architecture [55] Multi-pipeline partitioning architecture [44][45] Memory management [47] Optimal routing prefix [48] IP range breakdown [51] Distributed TCAM architecture [46] Prefix address partitioning [52] Routing table partitioning [53] Range expansion using rule compaction [54] Bit vector protocol [56][57] Bloom filter query [59][60]…”

TCAmMCogniGron: Energy Efficient Memristor-Based TCAM for Match-Action Processing

“…In [20], [45], Bayram et al studied the use of various memristive materials, including magnetic tunnel junctions (MTJs), for TCAM architectures and analyzed the performance for various hardware configurations. The directions of some researches, not directly related to our research, include fault tolerance in memristive TCAM architectures [46], memristor-CMOS based CAM architectures [47], memristor-based crossbar architectures for pattern matching applications [18], inmemory computing analysis using resistive TCAMs [48], read circuits for memristive architectures [49] and CAM cell designs using FeFET cells [50]. In comparison to previous researches, we aimed for a general purpose design that allows to integrate and even compare different types of memristors.…”

Memristor Based Autoencoder for Unsupervised Real-Time Network Intrusion and Anomaly Detection

“…Work in [12] presents memristor based intrusion detection hardware implemented as a supervised multilayer perceptron (MLP), which achieved a classification accuracy greater than 99% when using the KDD Cup'99 dataset. Work in [13] presents a memristor based deep packet inspection (DPI) system for high speed intrusion detection and classification.…”