Efficient FPGA architecture of optimized Haar wavelet transform for image and video processing applications

Sarkar, Sayantam; Bhairannawar, Satish S.

doi:10.1007/s11045-020-00759-4

Cited by 12 publications

(6 citation statements)

References 39 publications

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“…where, α is constant value varies from 0 to 1: LLCoveris the LL band coefficients of the cover image and LLSecretis the LL band coefficients of the secret image. The hardware architecture of the alpha blending is shown in the Figure 4 where efficient koggy stone adder/subtractor [33] and vedic multiplier [34] architectures are used to get optimized hardware utilizations. The D FlipFlop (DFF) is used to synchronize the watermarked data with the clk signal.…”

Section: Alpha Blending and De Blendingmentioning

confidence: 99%

Efficient reconfigurable architecture to enhance medical image security

Marakumbi¹,

Bhairannawar

2023

IJEECS

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Medical images are one of the most critical and sensitive types of data in information systems. For the secure storage and transfer of medical images, confidentiality is the most important aspect. This paper presents efficient embedding technique to enhance medical image security. The Gaussian filters are used as preprocessing to remove high frequency components and then applied to cumulative distribution function (CDF) 5/3 wavelet to obtain LL band features. Similarly, the LL band features of cover image are obtained. The alpha bending technique combines both the LL band features of cover and secret image to form first level of encryption and now with other high frequency bands of LH, HL and HH applied to Inverse CDF 5/3 obtains an encrypted image which is then transferred along with key obtained through other bands of LH, HL and HH. The key generated acts as additional level of security and similarly, at the receiver the opposite operations are performed to obtain the original secrete image. The performance is measured in terms of Peak signal-to-noise ratio (PSNR) and is compared with existing techniques to validate the results. Further, the entire architecture is synthesized on spartan 6 field-programmable gate array (FPGA) board to compare the hardware utilizations.

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Section: Alpha Blending and De Blendingmentioning

confidence: 99%

Efficient reconfigurable architecture to enhance medical image security

Marakumbi¹,

Bhairannawar

2023

IJEECS

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“…The radial distance ratio data of video image feature points and non-feature points are used for one-dimensional wavelet transform (Sarkar et al 2021) The decomposition calculation is performed as Eqs. 3-4.…”

Section: Generation Of Video Digital Watermarkmentioning

confidence: 99%

Digital watermarks for videos based on a locality-sensitive hashing algorithm

Sun¹,

Srivast

2023

Preprint

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Sensitive information in images is leaked during attacks, resulting in the malicious acquisition of personal privacy. To improve the robustness of attacking defence for video images, a digital watermarking algorithm based on locality-sensitive hashing (LSH) is designed. The video signal was decomposed using a one-dimensional wavelet transform. According to the Yeung Mintzer (Y-M) algorithm, a marker watermark W1 was embedded in the low-frequency subband to identify image tampering. The data string of hash function values and the exclusive OR (XOR) result of identification watermark W2 were embedded into the HH high-frequency subband, which was used to identify and counter the pseudo-authentication attacks such as collage and Vector Quantization(VQ). The singular value decomposition (SVD) algorithm was used to decompose the hash-mapped watermark and adaptively adjust the embedding strength of the watermark. The position-sensitive hash algorithm proposed has good invisibility for embedding digital watermarks into images, with an average accuracy of approximately 97% for feature matching of digital images. The PSNR value of the image embedded with the watermark is approximately 49 dB. At the 50th minute of the experiment, the regulatory factor value of the research method was 0.3. Under different attack modes, the correlation coefficient between the watermark extracted by this method and the original watermark image is greater than 0.85. Due to the low compression quality of JPGE, the correlation coefficient between the watermark and the initial watermark is greater than 0.6, and its error rate is less than 0.10bit.

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“…To check the accuracy of the Optimised RGB565 to RGB444 Conversion block, the full range of RGB565 values is considered for each color plane separately and then the corresponding RGB444 values are calculated using Equation (). Also, the same inputs are fed to the proposed conversion block and the corresponding

false∣ E r r o r false∣

is calculated [40] separately for each color plane using Equation () as follows:

false∣ E r r o r false∣ = false∣ A - B false∣

where,

false∣ E r r o r false∣ \to

is the error occurred in proposed architecture.…”

Section: Performance Evaluationmentioning

confidence: 99%

FPGACam: A FPGA based efficient camera interfacing architecture for real time video processing

Sarkar

Bhairannawar

Raja

2021

IET Circuits, Devices & Syst

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In most of the real time video processing applications, cameras are used to capture live video with embedded systems/Field Programmable Gate Arrays (FPGAs) to process and convert it into the suitable format supported by display devices. In such cases, the interface between the camera and display device plays a vital role with respect to the quality of the captured and displayed video, respectively. In this paper, we propose an efficient FPGA-based low cost Complementary Metal Oxide Semiconductor (CMOS) camera interfacing architecture for live video streaming and processing applications. The novelty of our work is the design of optimised architectures for Controllers, Converters, and several interfacing blocks to extract and process the video frames in real time efficiently. The flexibility of parallelism has been exploited in the design for Image Capture and Video Graphics Array (VGA) Generator blocks. The Display Data Channel Conversion block required for VGA to High Definition Multimedia Interface Conversion has been modified to suit our objective by using optimised Finite State Machine and Transition Minimiszed Differential Signalling Encoder through the use of simple logic architectures, respectively. The hardware utilization of the entire architecture is compared with the existing one which shows that the proposed architecture requires nearly 44% less hardware resources than the existing one.This is an open access article under the terms of the Creative Commons Attribution License, which permits use, distribution and reproduction in any medium, provided the original work is properly cited.

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Efficient FPGA architecture of optimized Haar wavelet transform for image and video processing applications

Cited by 12 publications

References 39 publications

Efficient reconfigurable architecture to enhance medical image security

Efficient reconfigurable architecture to enhance medical image security

Digital watermarks for videos based on a locality-sensitive hashing algorithm

FPGACam: A FPGA based efficient camera interfacing architecture for real time video processing

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