Efficient Finite Impulse Response Filter Architecture Using Multiple Constant Multiplication and Common Sub-Expression Elimination Techniques

Abstract

Objective: This paper introduces the computationally efficient, low power, high speed partial reconfigurable Finite impulse response (FIR) filter design using multiple constant multiplication technique (MCM). The complexity of many digital signal processing (DSP) systems is reduced by multiple constant multiplication operation.Methods: Multiple constant multiplications (MCM) along with methods like common sub expression elimination (CSE) is used for the better performance of digital signal processing systems. This paper introduces a CSE operation of finite Impulse response filter design which is solved with decreased number of operators.Results: Using these techniques shows that the area efficiency is increased when compared with designs based on direct form implementation of FIR filters. Conclusion:This method has achieved minimum area and delay with a high process rate. The future work will be for using CSE for 0-1 ILP.