Efficient Design Validation Based on Cultural Algorithms

Wu, Weixin; Hsiao, Michael S.

doi:10.1109/date.2008.4484714

Cited by 9 publications

(6 citation statements)

References 5 publications

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“…While it has shown a better performance, GA still faces the dead-end problem since it does not use global knowledge from each chromosome (individual). The work in [5] introduces cultural algorithms (CA) to improve the efficiency of test generation. Data mining is employed to extract the partition sets from gate-level netlist to form the abstract model, and the obtained information of abstract pre-images is used in the fitness calculation to evaluate each individual.…”

Section: A Motivation Of Our Approachmentioning

confidence: 99%

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Path Constraint Solving Based Test Generation for Hard-to-Reach States

Zhou¹,

Wang²,

Lv³

et al. 2013

2013 22nd Asian Test Symposium

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Test generation for hard-to-reach states has been one of the hardest tasks in functional verification. In this paper, we present PACOST, a PAth COnstraint Solving based Test generation method which operates in an abstraction-guided simulation framework to cover hard-to-reach states. PACOST combines concrete simulation and symbolic simulation in a path constraint solver to generate a set of valid input vectors for exploring different simulation paths, followed by next state selection considering abstract distances. In addition, two backtracking strategies are proposed to alleviate the dead end problem and ensure fast converge to the target state. Experimental results show that PACOST is effective in covering hard-to-reach states.

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Section: A Motivation Of Our Approachmentioning

confidence: 99%

“…Among them, the abstraction-guided simulation has revealed itself as a promising direction, in which formal analysis is applied to an abstract model to get the approximate distances, and the distances are used to direct the simulation to reach a concrete target state [1][2][3][4][5][6].…”

Section: Introductionmentioning

confidence: 99%

Path Constraint Solving Based Test Generation for Hard-to-Reach States

Zhou¹,

Wang²,

Lv³

et al. 2013

2013 22nd Asian Test Symposium

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show abstract

“…[21] builds the abstraction by selecting the design module containing the verification property and the modules that interacts closely with it, under some complexity constraint with regard to the final product FSM. With data-mining techniques, this abstraction can be also done as in [22,23] by partitioning state variables that are highly correlated to the target state. Based on the abstract FSM model, pre-images of the targets state are iteratively computed via a satisfiability (SAT) engine.…”

Section: Fault Based Test Data Generationmentioning

confidence: 99%

“…The distance from the current state to the target state becomes the cost function of search, guiding the search towards a target test input. Equipped with such guidance, the search algorithms employed include a simple random walk in [21], more sophisticatedly a cultural algorithm in [22] and a genetic algorithm in [23]. The SAT engine also intervenes during search to bridge the current state to a closer state, when the search heuristics get stuck at a dead-end state.…”

Section: Fault Based Test Data Generationmentioning

confidence: 99%

HDL-Mutation Based Simulation Data Generation by Propagation Guided Search

Xie

Mueller

Letombe³

2011

2011 14th Euromicro Conference on Digital System Design

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HDL-mutation based fault injection and analysis is considered as an important coverage metric for measuring the quality of design simulation processes [20, 3, 1, 2]. In this work, we try to solve the problem of automatic simulation data generation targeting HDL mutation faults. We follow a search based approach and eliminate the need for symbolic execution and mathematical constraint solving from existing work. An objective cost function is defined on the test input space and serves the guidance of search for fault-detecting test data. This is done by first mapping the simulation traces under a test onto a control and data flow graph structure which is extracted from the design. Then the progress of fault detection can be measured quantitatively on this graph to be the cost value. By minimizing this cost we approach the target test data. The effectiveness of the cost function is investigated under an example neighborhood search scheme. Case study with a floating point arithmetic IP design has shown that the cost function is able to guide effectively the search procedure towards a fault-detecting test. The cost calculation time as the search overhead was also observed to be minor compared to the actual design simulation time.

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“…Cost functions derived from static abstraction are used to guide random simulation [Shyam and Bertacco 2006;de Paula and Hu 2007;Wu and Hsiao 2008].…”

Section: Hardware Validationmentioning

confidence: 99%

Scaling Input Stimulus Generation through Hybrid Static and Dynamic Analysis of RTL

Liu

Vasudevan

2014

ACM Trans. Des. Autom. Electron. Syst.

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We enhance STAR, an automatic technique for functional input vector generation for design validation. STAR statically analyzes the source code of the Register-Transfer Level (RTL) design. The STAR approach is a hybrid between RTL symbolic execution and concrete simulation that offsets the disadvantages of both. The symbolic execution, which follows the concrete simulation path, extracts constraints for that path. The guard in the path constraints is then mutated and passed to an SMT solver. A satisfiable assignment generates a valid input vector. However, STAR suffers the problem of path explosion during symbolic execution. In this article, we present an explored symbolic state caching method to attack path explosion. Explored symbolic states are states starting from which all subpaths have been explored. Each explored symbolic state is stored in the form of bitmap encoding of branches to ease comparison. When the explored symbolic state is reached again in the following symbolic execution, all subpaths can be pruned. In addition, we use two types of optimizations: (a) dynamic UD chain slicing; and (b) local conflict resolution to improve the running efficiency of STAR. We demonstrate that the results of the enhanced STAR are promising in showing high coverage on benchmark RTL designs, and the runtime of the test generation process is reduced from several hours to less than 20 minutes.

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Efficient Design Validation Based on Cultural Algorithms

Cited by 9 publications

References 5 publications

Path Constraint Solving Based Test Generation for Hard-to-Reach States

Path Constraint Solving Based Test Generation for Hard-to-Reach States

HDL-Mutation Based Simulation Data Generation by Propagation Guided Search

Scaling Input Stimulus Generation through Hybrid Static and Dynamic Analysis of RTL

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