2010
DOI: 10.1007/s11227-010-0458-3
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Efficient datapath merging for the overhead reduction of run-time reconfigurable systems

Abstract: High latencies in FPGA reconfiguration are known as a major overhead in run-time reconfigurable systems. This overhead can be reduced by merging multiple data flow graphs representing different kernels of the original program into a single (merged) datapath that will be configured less often compared to the separate datapaths scenario. However, the additional hardware introduced by this technique increases the kernels execution time. In this paper, we present a novel datapath merging technique that reduces bot… Show more

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Cited by 15 publications
(16 citation statements)
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References 26 publications
(43 reference statements)
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“…We have implemented the proposed merging algorithms and the datapath merging algorithm in [12], as well. The algorithm in [12] is based on the maximum weighted clique, while our algorithms use the bounded-execution timeweighted clique.…”
Section: Resultsmentioning
confidence: 99%
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“…We have implemented the proposed merging algorithms and the datapath merging algorithm in [12], as well. The algorithm in [12] is based on the maximum weighted clique, while our algorithms use the bounded-execution timeweighted clique.…”
Section: Resultsmentioning
confidence: 99%
“…So, the node a 1 ,b 1 is created in G c for this merge that its weight indicates to the 360 ns reduction in configuration time resulted from merging the vertices. This weight is the difference between the configuration time of the obtained vertex in MDP and configuration time of the original vertices before merging [12]. In this way, the compatibility graph "G c " for two DFGs G 1 and G 2 is created by using the method was explained above.…”
Section: -Making the Compatibility Graph Between Mdp Andmentioning
confidence: 99%
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