Efficient condition code emulation for dynamic binary translation systems

Abstract

Dynamic binary translation is widely used in cross-ISA (Instruction Set Architecture) binary migration. With the technology, computers can directly execute programs compiled in other platforms, which helps to reduce the cost of software migration between different architectures. Efficient condition code emulation is critical for achieving higher performance. However, existing binary translation systems typically have to emulate the guest flags register with memory variables to hide the ISA difference, which is less-efficient due to code expansion. In this paper, we propose a way to substitute guest conditional instructions with counterpart instructions from the host ISA to achieve higher performance in flags register emulation. We recognize flag-defining and flag-checking instructions respectively through scanning the guest code sequence and then reproduce the condition pattern in the dynamically generated host code with the corresponding flag-related instructions in the host ISA. The evaluation results show that our approach manages to reduce the dynamically generated host instructions by 7.53% and improve the performance by 14.3% on average.