2018 Asia-Pacific Signal and Information Processing Association Annual Summit and Conference (APSIPA ASC) 2018
DOI: 10.23919/apsipa.2018.8659674
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Efficient Computational Scheduling of Box and Gaussian FIR Filtering for CPU Microarchitecture

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Cited by 20 publications
(9 citation statements)
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“…However, there is still little research on the efficient hardware implementation of SDCT filters, which are FIR filters realized as recursive filters. This research is limited to CPU [21], [58]. The 1-pass 2D filter [58] is highly cache-efficient with fewer synchronizations, although only multichannel data can be vectorized.…”
Section: B Short-time Fourier and Sliding Transformsmentioning
confidence: 99%
“…However, there is still little research on the efficient hardware implementation of SDCT filters, which are FIR filters realized as recursive filters. This research is limited to CPU [21], [58]. The 1-pass 2D filter [58] is highly cache-efficient with fewer synchronizations, although only multichannel data can be vectorized.…”
Section: B Short-time Fourier and Sliding Transformsmentioning
confidence: 99%
“…In existing works on common sub-expression elimination, the process is often described and notated using an array index notation or wiring diagrams (Pasko et al, 1999;Mori et al, 2012;Fukushima et al, 2018). While these notations are sufficient for explanation, they do not make the limitations of the manipulations being used apparent, and so make it difficult to consider how different optimizations could be combined.…”
Section: Related Workmentioning
confidence: 99%
“…3b, respectively. For computing SSR, we can use sliding-DCT-based convolution 22,[32][33][34] , which has constant-time property per pixel for convolution. FFT's computational order is O(log N) per pixel, where N is the number of image pixels, while sliding-DCT's one is O(1).…”
Section: Illuminating Saliency Mapmentioning
confidence: 99%