Efficiency and time resolution of monolithic silicon pixel detectors in SiGe BiCMOS technology

Abstract

A monolithic silicon pixel detector prototype has been produced in the SiGe BiCMOS SG13G2 130 nm node technology by IHP. The ASIC contains a matrix of hexagonal pixels with pitch of approximately 100 μm. Three analog pixels were calibrated in laboratory with radioactive sources and tested in a 180 GeV/c pion beamline at the CERN SPS. A detection efficiency of (99.9-0.2 +0.1)% was measured together with a time resolution of (36.4 ± 0.8) ps at the highest preamplifier bias current working point of 150 μA and at a sensor bias voltage of 160 V. The ASIC was also characterized at lower bias voltage and preamplifier current.

20 ps Time Resolution with a Fully-Efficient Monolithic Silicon Pixel Detector without Internal Gain Layer

“…The ASIC was produced using the 130 nm SG13G2 process by IHP Microelectronics. It represents an evolution of a previous MONOLITH prototype [12]. The ASIC matrix, shown in Figure 1, contains 144 hexagonal pixels of 65 µm side (corresponding approximately to a pixel pitch of 100 µm), comprising 4 analog pixels (named hereafter OA0, OA1, OA2 and OA3) with the preamplifier directly connected to an analog driver to be read by an oscilloscope.…”

“…In this second prototype the front-end electronics was improved to address the issues observed in the previous one. First of all, to remove the feedback path that was causing cross-talk between the channels and instability [12], the power supply of the preamplifier was separated from that of the driver stage. This optimization had a positive impact on the charge measurement used for the time-walk correction and on the overall performance of the detector.…”

“…This research group is trying to develop MAPS with picosecond time capabilities. Making use of the commercial SG13G2 IHP 130 nm process [7], we produced a series of monolithic prototypes with very fast and low noise SiGe HBT front-end electronics that achieved time resolutions down to 36 ps [8][9][10][11][12] with standard PN junction sensors without internal gain layer. This research line evolved in the MONOLITH H2020 ERC Advanced project [13], which exploits the novel multi-PN junction PicoAD sensor [14] to achieve picosecondlevel time resolutions by means of the signal-over-noise boost provided by a continuous deep gain layer.…”

“…Recently, the second monolithic silicon pixel matrix prototype for the MONOLITH project was produced in the SG13G2 IHP process. The ASIC contains an evolution of the front-end electronics of [12] and is designed for improved operation capabilities. While the special PicoAD wafers that implement a gain layer were being manufactured, a version with a standard PN-junction sensor was produced using wafers with 50 µm thick epilayer of a resistivity of 350 Ωcm.…”

4D Tracking: Present Status and Perspective

“…The last example of a monolithic detector without internal gain, the Mon-PicoAD [15], differs from the previous two in the choice of technology: it uses SiGe instead of CMOS. The monolithic silicon pixel detector prototype has been produced in the SiGe BiCMOS SG13G2 130 nm node technology by IHP.…”