2021
DOI: 10.1016/j.rinp.2021.104744
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Effects of silicon surface defects on the graphene/silicon Schottky characteristics

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Cited by 8 publications
(19 citation statements)
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“…[23] It has been shown that the Schottky barrier height strongly depends on the number of surface states at the metal/semiconductor interface. [83,84] For instance, Kasahara et al has proposed that the Schottky barrier height highly depends on the contact area of the Fe 3 Si/Ge junction due to the different number of interfacial defects. [85] The unequal Schottky barrier heights for AS-MoS 2 device can be explained by the unequal number of MoS 2 /Cr interface states at two sides, which could be attributed to the presence of S-vacancies.…”
Section: Resultsmentioning
confidence: 99%
See 1 more Smart Citation
“…[23] It has been shown that the Schottky barrier height strongly depends on the number of surface states at the metal/semiconductor interface. [83,84] For instance, Kasahara et al has proposed that the Schottky barrier height highly depends on the contact area of the Fe 3 Si/Ge junction due to the different number of interfacial defects. [85] The unequal Schottky barrier heights for AS-MoS 2 device can be explained by the unequal number of MoS 2 /Cr interface states at two sides, which could be attributed to the presence of S-vacancies.…”
Section: Resultsmentioning
confidence: 99%
“…It has been shown that the Schottky barrier height strongly depends on the number of surface states at the metal/semiconductor interface. [ 83,84 ] For instance, Kasahara et al. has proposed that the Schottky barrier height highly depends on the contact area of the Fe 3 Si/Ge junction due to the different number of interfacial defects.…”
Section: Resultsmentioning
confidence: 99%
“…The main challenge is to carry out a precise reduction process (using different reducing agents or reduction conditions), with the possibility of controlling both the reduction degree (the OFGs’ content) and the selectivity of the key OFGs’ removal [ 11 , 33 ]. Moreover, when dealing with applications in different optoelectronic and energy conversion and electrochemical storage areas the other very important issue is that the reduction process must be compatible with on-chip integration [ 9 , 34 , 35 , 36 , 37 ].…”
Section: Introductionmentioning
confidence: 99%
“…17,18 For a larger bias, lnJ DT ∞ V. If the applied voltage is much smaller than the barrier height, the slope of lnJ DT versus voltage plot is a linear function of the applied voltage, 18 or one can fit the tunneling current at low voltage with a quadratic equation. It should be noted that interface and oxide traps could assist the current conduction in the MIS structure via the Poole−Frenkel emission; 12,16 however, no notable excess current was observed in the present plot. This is because the insulating film was so thin (only 2 nm, which is below the direct tunneling limit) that the electrons could readily tunnel through the thin film before being captured by the defects.…”
Section: Resultsmentioning
confidence: 52%
“…Unlike the metal/Si interface, where the silicon dangling bond can effectively be passivated with the metal, the graphene/Si contact is weakly bonded by van der Waal forces and the Si surface dangling bonds covered by graphene are electrically active and can trap both electrons and holes . Growing a high-quality insulating layer could be one of the effective methods in passivating the silicon dangling bonds and enhancing the power conversion efficiency (PCE) of the solar cells significantly. In the work reported in ACS Appl. Energy Mater.…”
Section: Introductionmentioning
confidence: 99%