Effects of Oxide Electric Field Stress on the Gate Oxide Reliability of Commercial SiC Power MOSFETs

Shi, Limeng; Liu, Tianshi; Zhu, Shengnan; Qian, Jiashu; Jin, Michael; Maddi, Hema Lata Rao; White, M.H.; Agarwal, Anant

doi:10.1109/wipda56483.2022.9955295

Cited by 6 publications

(1 citation statement)

References 9 publications

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“…The high overlap of the three curves demonstrates the high uniformity in gate oxide quality of the commercial DUTs. This indicates that these commercial DUTs undergo stringent gate oxide screening before leaving the factory, reducing the adverse impact of early oxide failure caused by extrinsic defects on subsequent test results [38]. The I gss curves for all three DUTs exhibit breakdown near 50 V, with an average gate oxide breakdown voltage of about 48.57 V. Based on the assumption that the critical breakdown electric field is about 11 MV/cm for SiO 2 , the gate oxide thickness of DUTs can be estimated to be approximately 44.15 nm [39].…”

Section: Devices Under Test (Duts)mentioning

confidence: 99%

Modeling of Charge-to-Breakdown with an Electron Trapping Model for Analysis of Thermal Gate Oxide Failure Mechanism in SiC Power MOSFETs

Qian,

Shi,

Jin

et al. 2024

Materials

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The failure mechanism of thermal gate oxide in silicon carbide (SiC) power metal oxide semiconductor field effect transistors (MOSFETs), whether it is field-driven breakdown or charge-driven breakdown, has always been a controversial topic. Previous studies have demonstrated that the failure time of thermally grown silicon dioxide (SiO2) on SiC stressed with a constant voltage is indicated as charge driven rather than field driven through the observation of Weibull Slope β. Considering the importance of the accurate failure mechanism for the thermal gate oxide lifetime prediction model of time-dependent dielectric breakdown (TDDB), charge-driven breakdown needs to be further fundamentally justified. In this work, the charge-to-breakdown (QBD) of the thermal gate oxide in a type of commercial planar SiC power MOSFETs, under the constant current stress (CCS), constant voltage stress (CVS), and pulsed voltage stress (PVS) are extracted, respectively. A mathematical electron trapping model in thermal SiO2 grown on single crystal silicon (Si) under CCS, which was proposed by M. Liang et al., is proven to work equally well with thermal SiO2 grown on SiC and used to deduce the QBD model of the device under test (DUT). Compared with the QBD obtained under the three stress conditions, the charge-driven breakdown mechanism is validated in the thermal gate oxide of SiC power MOSFETs.

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Section: Devices Under Test (Duts)mentioning

confidence: 99%