Effects of mid-gap defects and barrier interface reactions on tunneling behaviors of ZnO-i-Si heterojunctions

Abstract

Low-leakage pin diodes based on ZnO-i-Si are realized by redox reaction of aluminum with the native oxide SiOx into AlOx and by proper selection of annealing conditions. The main sources of electric leakage was found to arise from charge carrier tunneling via mid-gap states in the semiconductors or lowered tunneling barriers. Less mid-gap states in n-ZnO and high tunneling barrier of the i-layer are key to lowering the leakage. Proper post-annealing of pin diodes effectively heal the mid-gap defects, while maintaining the integrity of the tunneling layers, thus lowering the leakage currents to reach a rectification ratio of 2400, surpassing most similarly benchmarked devices reported in literature. Excessive annealing causes some part of the i-layer to transform into to ZnAl2O4 and Al:ZnO. High Al-doping and lowered potential barrier provided by ZnAl2O4 are responsible for high leakage currents in devices so fabricated.

Determination of interlayer electron mobility in multilayer MoS2 flake using impedance spectroscopy

“…Therefore, to harness full potential of the m-MoS 2 flake, a systematic study of its electrical properties is desired. Some recent reports mentioned anisotropic behaviour of layered TMDC and showed that MoS 2 exhibits highly anisotropic electronic and mechanical properties in comparison to isotropic crystalline materials such as Si and Ge [18,25,26]. For instance, dielectric constant in MoS 2 is highly direction dependent and profoundly depends on the number of layers present in the stack of the m-MoS 2 [27,28].…”