Effects Of Hydrogen Annealing On Data Retention Time For High Density Drams

Hsia, L. C.; Chang, T. C.; Chang, Shoou Jinn; Fan, Donghua; Wei, Hongyuan; Jan, J.

doi:10.1109/vtsa.1997.614746

Cited by 3 publications

(1 citation statement)

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“…Schemes that reduce leakage current by optimizing process conditions or by controlling the potential of various nodes in the cell have been reported in [8,3]. Schemes for dynamically controlling the refresh period through a limited number of temperature or current sensors have been reported in [11,14].…”

Section: Introductionmentioning

confidence: 99%

Block-based multi-period refresh for energy efficient dynamic memory

Kim

Papaefthymiou²

Proceedings 14th Annual IEEE International ASIC/SOC Conference (IEEE Cat. No.01TH8558)

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Public Reporting burden for this collection of information is estimated to average 1 liour per response, including flie time for reviewing instructions, searching existing data sources, gathering and maintaining the data needed, and conpleting and reviewing the collection of information. Send comment regarding this burden estimates or any other aspect of this collection of information, including suggestions for reducing this burden, to Washington Headquarters Services, Directorate for information Operations and Reports, 1215 Jefferson Davis Highway, Suite 1204, Arlington, VA 22202-4302, and DRAMs are widely used In portable applications due to their high storage density. In standby mode their main source of power dissipation Is the refresh operation that periodically restores leaking charge In each cell to its correct level. Conventional DRAMs use a single refresh period determined by the cell with the largest leakage. This approach is simple but dissipative, because it forces unnecessary refreshes for the majority of the cells with small leakage.In this paper we Investigate a novel scheme that relies on multiple refresh periods and small refresh blocks to reduce DRAM dissipation by decreasing the number of cells refreshed too often. Long periods are used to accommodate cells with small leakage. In contrast to conventional row-based refresh, small refresh blocks are used to increase worst case data retention times. Retention times are further extended by adding a swap cell to each refresh block.We give a novel polynomial-time algorithm for computing an optimal set of refresh periods for block-based multiperiod refresh. Specifically, given an integer Kand a distribution of data retention times, in O(KN^) steps our algorithm computes /< refresh periods that minimize DRAM dissipation, where N is the number of refresh blocks in the memory. We describe and evaluate a possible implementation of our refresh scheme. In simulations with a 16Mb DRAM, block-based multi-rate refresh reduces standby dissipation by a multiplicative factor of 4 with area overhead below 6%. ABSTRACTDRAMs are widely used in portable applications due to their high storage density. In standby mode, their main source of power dissipation is the refresh operation that periodically restores leaking charge in each cell to its correct level. Conven

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Section: Introductionmentioning

confidence: 99%