Effects of anneal ambients and Pt thickness on Pt/Ti and Pt/Ti/TiN interfacial reactions

Abstract

Using x-ray diffraction, Rutherford backscattering spectrometry, Auger electron spectroscopy, and scanning electron microscopy, effects of ambient anneal and Pt thickness on the interdiffusion of Pt/Ti bilayers deposited on SiO2/Si and on reactively sputtered TiN/Ti/Si substrates have been investigated. The Pt layer was 2000 or 930 Å thick while the Ti thickness was fixed at 1000 Å. The wafers were annealed in either O2 or N2 ambients or in N2 followed by O2, with temperatures ranging from 600 to 800 °C for 30 min. The anneal ambients and the thickness of Pt relative to the Ti layer had tremendous effects on the interdiffusion processes, the reaction products, and the surface morphology of the multilayer structures. Samples annealed in O2 were generally rough, with bumps of the order of 1000 Å, while those annealed in N2 were relatively smooth. With lead zirconium titanate on top, the surface of Pt/Ti electrode annealed in O2 at 650 °C was relatively smooth.

Thin fim barium strontium titanate capacitors for tunable RF frond-end applications

“…Titanium diffuses through the Pt, which is consistent with electrode material studies by J.O. Olowolafe et al [139] and by A. Erlich et al [140]. Titanium diffused through the Pt and formed a TiO 2 dead layer with a lower dielectric constant than BST.…”

“…CHARACTERIZATION AND OPTIMIZATION Therefore, glass-planarized alumina and thermally oxidized silicon require an adhesion layer to prevent delamination from the substrate [83]. The most commonly used adhesion layer consists of titanium (Ti) [32,137,139,140].…”

“…Pt was therefore chosen for the electrode material since it is a noble metal and is known to be resistant to oxidation and corrosion [138]. Pt is known to have a poor adhesion to semiconductor and dielectric substrates [139,140]. CHARACTERIZATION AND OPTIMIZATION Therefore, glass-planarized alumina and thermally oxidized silicon require an adhesion layer to prevent delamination from the substrate [83].…”

Structural investigations of Pt∕TiOx electrode stacks for ferroelectric thin film devices

“…The Pt hillocks with radii typically ranging from 20 to 70 nm for the case at hand are much smaller than those on Pt/ Ti electrode stacks as reported earlier. [8][9][10] For Pt films deposited using dc sputtering at low temperatures, a compressive stress is generally present. 10,[18][19][20] The stress is relaxed under high-temperature treatments through the formation of Pt hillocks and becomes tensile upon cooling down to room temperature because of the thermal strain.…”

“…However, the Pt/ Ti metallic electrode shows poor thermal stability and reliability including the formation of Pt hillocks [5][6][7][8] or bumps under thermal conditions, 9 surface morphology evolution during aging, 7 short circuit of ferroelectric capacitors caused by the Pt hillocks, 10 severe diffusion of Ti into Pt, and even encapsulation of Pt hillocks with TiO x during annealing. 6,[9][10][11] In contrast, Sreenivas et al reported that the Pt/ TiO x electrode structure shows an improved thermal stability. 6 For a given ferroelectric medium with a certain chemistry and structure, the ferroelectricity is dependent on the electrical and mechanical boundary conditions to a great extent.…”