Effectiveness Analysis of DVFS and DPM in Mobile Devices

Seo, Youngbin; Kim, Jeongki; Seo, Euiseong

doi:10.1007/s11390-012-1264-6

Cited by 11 publications

(5 citation statements)

References 18 publications

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“…f k can therefore be regarded as little time thieves. From a mathematical point of view, the presence of f k in Equation 5 also introduces some complexity for derivations such as Equation 14. Bear in mind that the microprocessor's clock frequency f is always larger than f k ; otherwise the execution time is not defined.…”

Section: What About Those Time Thieves?mentioning

confidence: 99%

“…For example, such occasions may occur when the clock frequency microprocessor is reasonably fast, or the code sequence of concern is running only on one of the available cores of a multi-core microprocessor without interruption. Assuming f k negligible considerably simplifies Equation 14. For max(f min , f k ) < f opt < f max , E n was said to be strictly convex iff there exists only one point in the exploitable clock frequency window for which ∂En ∂f = 0 and ∂ 2 En ∂f 2 > 0.…”

Section: Absence Of Time Thievesmentioning

confidence: 99%

“…For more powerful computers, however, such as servers, the optimal frequency will be very likely out of reach of the microprocessor's capabilities: f opt > f max . For example, Seo et al [14] claim that Dynamic Voltage and Frequency Scaling (DVFS) in general hardly improves the energy efficiency of mobile multimedia electronics. The testbed power measurements of their embedded system show, however, that their P cpu to P back ratio is smaller than 1 to 18, and their m 1 is very small.…”

Section: Absence Of Time Thievesmentioning

confidence: 99%

See 2 more Smart Citations

Parameter sensitivity analysis of the Energy/Frequency Convexity Rule for application processors

Vogeleer

Memmi

Jouvelot

2017

Sustainable Computing: Informatics and Systems

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Both theoretical and experimental evidence are presented in this work in order to validate the existence of an Energy/Frequency Convexity Rule, which relates energy consumption and microprocessor frequency for nanometer-scale microprocessors. Data gathered during several month-long experimental acquisition campaigns, supported by several independent publications, suggest that energy consumed is indeed depending on the microprocessor's clock frequency, and, more interestingly, the curve exhibits a clear minimum over the processor's frequency range. An analytical model for this behavior is presented and motivated, which fits well with the experimental data. A parameter sensitivity analysis shows how parameters affect the energy minimum in the clock frequency space. The conditions are discussed under which this convexity rule can be exploited, and when other methods are more effective, with the aim of improving the computer system's energy management efficiency. We show that the power requirements of the computer system, besides the microprocessor, and the overhead affect the location of the energy minimum the most. The sensitivity analysis of the Energy/Frequency Convexity Rule puts forward a number of simple guidelines especially for by low-power systems, such as battery-powered and embedded systems, and less likely by high-performance computer systems.

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Section: What About Those Time Thieves?mentioning

confidence: 99%

Section: Absence Of Time Thievesmentioning

confidence: 99%

Section: Absence Of Time Thievesmentioning

confidence: 99%

See 1 more Smart Citation

Parameter sensitivity analysis of the Energy/Frequency Convexity Rule for application processors

Vogeleer

Memmi

Jouvelot

2017

Sustainable Computing: Informatics and Systems

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“…It has become an effective solution to overcome the problems of global communication in complex System on Chip designs [1]. For NoC, linking and routing is one of the important criteria for achieving a better performance of NoC network communication, and that may cause an overloaded in power according to serious limitation in battery life on NoC devices, on the other hand, dynamic voltage scaling (DVS) has been a key technique in exploiting the hardware characteristics of processors to reduce energy dissipation by lowering the supply voltage and operating frequency [2]. The DVS algorithms aim at saving energy under timing constraints.…”

Section: Introductionmentioning

confidence: 99%

An evolutionary cellular automaton for minimizing energy consumption in network on chip-based soft real-time embedded systems

Belkebir

Boutekkouk

2015

2015 3rd International Conference on Control, Engineering &Amp; Information Technology (CEIT)

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Embedded multimedia systems with multiapplication scenarios increase the number and computational power of processing elements. To satisfy this growing demand, a network on chip is used due to lower message latency, better scalability and more reliable performance predictability. Today the focus is not on the implementation of one single application on the many-core platforms, but using a single-die that support multi-application scenarios, and due to that the mapping strategies that map the application tasks on the chip should minimize the energy consumption of multiple parallel applications under timing constraints. We used a new paradigm called Evolutionary cellular automata offering diversity point of views called transition rules which are evolved in time progress in order to optimize an application's mapping.

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“…However the NoC consumes a lot of power [3]. The dynamic voltage and frequency scaling (DVFS) is a hardware feature that can in real-time adjust the clock frequency based on the operational voltage of a processor [19,20]. It is an effective technique for increasing the energy efficiency of a network by reducing the energy dissipation.…”

Section: Introductionmentioning

confidence: 99%

A comparative study of voltage/frequency scaling in NoC

Usman

Khan

2013

IEEE International Conference on Electro-Information Technology , EIT 2013

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Abstract-Voltage and frequency is dynamically scaled to produce energy efficient multi-core networkon-chip (NoC). A detailed analysis of the techniques employed for this purpose are studied and based on the optimized performance the most effective ones are reported. We also highlight the most promising high performance and energy minimizing techniques.Index Terms-Network-on-chip, dynamic voltage and frequency scaling, leakage power

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Effectiveness Analysis of DVFS and DPM in Mobile Devices

Cited by 11 publications

References 18 publications

Parameter sensitivity analysis of the Energy/Frequency Convexity Rule for application processors

Parameter sensitivity analysis of the Energy/Frequency Convexity Rule for application processors

An evolutionary cellular automaton for minimizing energy consumption in network on chip-based soft real-time embedded systems

A comparative study of voltage/frequency scaling in NoC

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