Effect of Thermal via Design on Heat Dissipation of High-Lead QFN Packages Mounted on PCB

Abstract

The quad flat no-lead package (QFN) is widely used in integrated circuits due to its advantages in performance and cost. With the increasing power of electronic products, effective heat dissipation from QFN packages has become crucial to prevent product damage. The focus of this study is to investigate the thermal performance of QFN packages soldered onto printed circuit boards (PCB) by finite element analysis (FEA). Conventional QFN, dual-row QFN, and high-lead QFN packages were modeled and compared by ANSYSY software. The effect of thermal via design (the distance, number, distribution, diameter, and thickness of thermal vias) on the QFN package was investigated. The study revealed that the high-lead QFN package consistently demonstrated superior heat dissipation performance than the other two under different conditions. Placing thermal vias closer to the heat source enhances heat dissipation efficiency. Thermal vias positioned beneath the thermal pad were particularly effective. Increasing thermal via quantity and diameter improved heat dissipation, with square distribution layouts showing advantages. However, excessive copper plating thickness can increase thermal resistance and hinder heat dissipation.