Effect of Temperature on Reliability Issues of Ferroelectric Dopant Segregated Schottky Barrier Tunnel Field Effect Transistor (Fe DS-SBTFET)

Ghosh, Puja; Bhowmick, Brinda

doi:10.1007/s12633-019-00206-5

Cited by 11 publications

(4 citation statements)

References 28 publications

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“…In today's communication systems, linearity is critical. High linearity of the device with minimal signal degradation is ensured by lower values of higher order harmonics and intermodulation at the output [36]. Linear parameters having high value shows lesser distortion at the output of the amplifier.…”

Section: Linearity Parameters Analysismentioning

confidence: 99%

Analog/RF Performance Projection of Ultra-Steep Si Doped HfO2 Based Negative Capacitance Electrostatically Doped TFET: A Process Variation Resistant Design

Singh

2021

Silicon

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The incorporation of Si doped HfO 2 in negative capacitance electrostatically doped TFET realizes ultra-steep and process variation resistant structure. Here, Si:HfO 2 is the gate stack ferroelectric material is used in conjunction with a high-K gate dielectric HfO 2 /TiO 2 . The conceptualization of intrinsic gate voltage amplification due to the alignment of ferroelectric dipoles comprehends the negative capacitance (NC) behavior. Moreover, the work-function difference between the source/drain electrodes and the silicon induces electrostatic doping. Thus, the detrimental doping related issues, heavy doping governed mobility degradation and statistical random dopant fluctuations (RDFs) can be eliminated and it results in more process variations immune design. This work has explored the impact of the symmetric and asymmetric structure of the considered devices on both the drain and source sides, in terms of the oxide thickness between the electrodes and the Si body. Here, analog/RF performance estimation is also carried out for the parameters such as transconductance (g m ), output conductance (g d ), unity gain frequency (f T ), intrinsic gain (A V ), transconductance frequency product (TFP), and gain frequency product (GFP), etc. Our study reveals that Si:HfO 2 ferroelectric gate stack with TiO 2 dielectric shows better device performance than Si:HfO 2 ferroelectric gate stack with HfO 2 dielectric for both dc as well as ac performance.

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Section: Linearity Parameters Analysismentioning

confidence: 99%

Analog/RF Performance Projection of Ultra-Steep Si Doped HfO2 Based Negative Capacitance Electrostatically Doped TFET: A Process Variation Resistant Design

Singh

2021

Silicon

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“…Device structure consists of two isolated gates separated from each other by 5 nm, named as control gate (CG) and polarity gate (PG). To convert the

N^{+} - N^{+} - N^{+}

substrate region into the

N^{+} - I - P^{+}

region, metals with work functions 4.3 eV (aluminium) and 5.93 eV (platinum) are used for the electrodes of CG and PG, respectively, which results into the formation of a JL‐TFET [5, 22–29]. Also, to improve the reliability of the JL‐TFET, stack of gate oxide

(Si O_{2} + Hf O_{2} false)

has been used instead of single layer of

Si O_{2}

[22].…”

Section: Device Structure and Simulation Setupmentioning

confidence: 99%

Temperature sensitivity analysis of SGO metal strip JL TFET

Nigam

Kumar

Singh

et al. 2020

IET Circuits, Devices & Systems

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Temperature sensitivity is one of the major concern in conventional stacked gate-oxide junctionless tunnel-field-effect transistor (SGO-JL-TFET). In this regard, the authors have investigated the sensitivity toward the temperature variation of the SGO-JL double-gate TFET with low work-function live strip (LWLS-SGO-JL-TFET) and without LWLS-SGO-JL-TFET (SGO-JL-TFET). Furthermore, they have analysed and compared the impact of operating temperature variation on the DC, analogue/ radiofrequency and linearity performances of both the devices with the help of simulation results obtained using technology computer-aided design tool. It can be stated that the proposed device is less sensitive toward the temperature variation in terms of carrier concentration, electric field, on-state current and off-state current, as compared with conventional SGO-JL-TFET. Apart from these parameters, proposed device also demonstrates better temperature sensitivity in terms of analogue performance parameters such as transconductance (g m) cutoff frequency (f T), gain bandwidth product and maximum oscillating frequency (f max). Therefore, the proposed device can be a potential candidate for cryogenics and high-temperature applications.

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“…A ferroelectric SB tunnel FET (Fe SB-TFET) with a highly doped pocket at the source/drain and channel interface and gate–drain underlap reduce tunneling barrier width at the source side SB, resulting in improved device performance with low subthreshold swing (SS), reduced ambipolar current and high I ON /I OFF [ 6 ]. Investigation of temperature’s effect on reliability issues of ferroelectric DS SB TFET reveals that the presence of a ferroelectric layer and the resulting negative capacitance effect increases the ON current, achieves highest I ON /I OFF ratio and reduces the SS to 23 mV/dec at 300 K [ 21 ]. Silicon on insulator SB-MOSFET (SOI SB-MOSFET) with source extension (SE) and with source drain extension (SDE) significantly reduces drain-induced barrier tunneling and produces higher I ON /I OFF and lower subthreshold swing (SS) than SOI SB-MOSFET [ 22 ].…”

Section: Introductionmentioning

confidence: 99%

Improved Dielectrically Modulated Quad Gate Schottky Barrier MOSFET Biosensor

et al. 2023

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A novel Schottky barrier MOSFET with quad gate and with source engineering has been proposed in this work. A high-κ dielectric is used at the source side of the channel, while SiO2 is used at the drain side of the channel. To improve the carrier mobility, a SiGe pocket region is created at the source side of the channel. Physical and electrical characteristics of the proposed device are compared with conventional double gate Schottky barrier MOSFET. It has been observed that the proposed device exhibits better performance, with a higher ION/IOFF ratio and lower subthreshold slope. The high-κ dielectric, along with the SiGe pocket region, improves tunneling probability, while aluminum, along with SiO2 at the drain side, broadens the drain/channel Schottky barrier and reduces the hole tunneling probability, resulting in a reduced OFF-state current. Further, the proposed device is used as a biosensor to detect both the charged and neutral biomolecules. Biosensors are made by creating a nanocavity in the dielectric region near the source end of the channel to capture biomolecules. Biomolecules such as streptavidin, biotin, APTES, cellulose and DNA have unique dielectric constants, which modulates the electrical parameters of the device. Different electrical parameters, viz., the electric field, surface potential and drain current, are analyzed for each biomolecule. It has been observed that drain current increases with the dielectric constant of the biomolecules. Furthermore, the sensitivity and selectivity of the proposed biosensors is better than that of conventional biosensors made using double gate Schottky barrier MOSFETs. Sensitivity is almost twice that of a conventional sensor, while selectivity is six to twelve times higher than a conventional one.

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Effect of Temperature on Reliability Issues of Ferroelectric Dopant Segregated Schottky Barrier Tunnel Field Effect Transistor (Fe DS-SBTFET)

Cited by 11 publications

References 28 publications

Analog/RF Performance Projection of Ultra-Steep Si Doped HfO2 Based Negative Capacitance Electrostatically Doped TFET: A Process Variation Resistant Design

Analog/RF Performance Projection of Ultra-Steep Si Doped HfO2 Based Negative Capacitance Electrostatically Doped TFET: A Process Variation Resistant Design

Temperature sensitivity analysis of SGO metal strip JL TFET

Improved Dielectrically Modulated Quad Gate Schottky Barrier MOSFET Biosensor

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