Abstract:The growing need for smaller form factors of smartphones and other handheld devices with greater computational capabilities has resulted in the emergence of stacked silicon (3D) architectures (also referred to as 2.5D type of devices by industry). The emergence of such devices requires us to re-evaluate existing CAD approaches to placement and routing. The extension of well established place and route tools to stacked (3D) FPGAs poses a new set of challenges. This short preliminary study uses a well known acad… Show more
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