Effect of Substrate Type on CoSi₂ Formation in Rapid Thermal Annealing

Abstract

Annealing process optimization was performed to achieve low resistivity CoSi 2 contacts used in different locations (word line, source, drain and gate regions) of advanced memory devices with various types of Si. The effect of Si type and annealing time on the resulting resistivity of the CoSi 2 was investigated over a wide range of annealing temperatures (350 ~ 900 o C) and times (60 ~ 300s) using a single wafer furnace-based (hot wall) rapid thermal annealing (RTA) system. The properties (conduction type, dopant, stacking structure and crystallinity) of the Si substrate contacting the Co film had a significant effect on the resulting CoSi 2 formation temperature and contact resistance. In general, the CoSi 2 formation temperature was reduced with the increase of RTA time. Significant differences in CoSi 2 formation temperature was observed from different types of Si. The CoSi 2 formation temperature for the source/drain (S/D) of P-type transistors was found to be the lowest. The CoSi 2 formation temperature for poly Si, used in cells, was found to be the highest and was the limiting factor in RTA temperature reduction efforts.

Thermal Silicidation of Ni/SiGe and Characterization of Resulting Nickel Germanosilicides

“…Thermal silicidation was performed using TiN/Ni/Si 1-x Ge x /Si/SiO 2 /Si wafers with different Ge content in a stacked hotplate-based SAO-302LP system designed for 300 mm wafers. 9,[21][22][23][24] Thicknesses of the TiN, Ni, Si 1-x Ge x , Si and SiO 2 layers were 5, 9, 80, 20 and 140 nm, respectively. Physical vapor deposited (PVD or sputtered) TiN (5 nm) capped Ni films (9 nm) were used.…”

“…Details of the annealing system (SAO-302LP), wafer temperature profile and other low temperature process applications (NiSi, Cu annealing and SOG annealing) results have been reported elsewhere. 9,[21][22][23][24] Unlike other annealing systems, the SAO-302LP system does not control wafer temperature directly and annealing time is also counted differently. For easy understanding, wafer temperature profiles at hot plate temperature set points of 200 °C, 300 °C and 400 °C are plotted in Fig.…”