Effect of SiO₂ Tunnel Oxide Thickness on Electron Tunneling Mechanism in Si Nanocrystal Dots Floating-Gate Memories

Abstract

The effect of tunnel oxide thickness on the charging/discharging mechanism and data retention of Si nanocrystal dot floating-gate devices was studied. The key point here is the difference in tunnel oxide thickness. Other parameters that can affect memory properties were carefully controlled. The mechanism of electron discharging was discussed on the basis of the difference in tunnel SiO2 thickness. Direct tunneling was found to dominate in the 3- and 5-nm-thick SiO2 tunnel oxides. However, Fowler–Nordheim (FN) tunneling affects the electron discharging characteristics of a thicker SiO2 tunnel oxide. It was found that memory properties also strongly depend on tunnel oxide thickness.

Dynamic charge transfer effects in two-dimensional silicon nanocrystal layers embedded within SiO2

“…12 Although this type of current behavior has been observed also by other groups, neither the displacement character nor the physical mechanisms behind this effect have been explained in depth so far. [13][14][15][16] In this work, we provide additional experimental evidence that the observed I-V peak is a transient effect independent of the substrate type. Furthermore, the samples that showed the transient peak exhibited intense frequency dependent admittance characteristics in the strong accumulation regime.…”

Experimental investigation of tunnel oxide thickness on charge transport through Si nanocrystal dot floating gate memories

“…Further details of the Si dot deposition have been reported previously. 11,12 The Si nanocrystal dot morphology was observed by atomic force microscopy ͑AFM͒, scanning electron microscopy ͑SEM͒, and high-resolution transmission electron microscopy ͑HRTEM͒. For metal-oxide-semiconductors ͑MOS͒ structures, Si dot deposition was performed on a high-quality thermal SiO 2 tunnel layer.…”

Low-Temperature Polycrystalline Silicon Thin Film Transistor Nonvolatile Memory Using Ni Nanocrystals as Charge-Trapping Centers Fabricated by Hydrogen Plasma Process

“…[1][2][3][4] Furthermore, a nonvolatile memory assisted by semiconductor nanocrystals (NCs), such as Si or Ge NCs, has widely been studied to examine the charge trapping ability of NCs. [5][6][7][8][9][10] One greatest advantage of using NCs is that charges are distributed in more trapping centers, which minimizes charge loss. It results in a thinner tunnel oxide, a lower working voltage, and a higher program/erase (P/E) speed.…”