2015 IEEE 10th International Conference on Industrial and Information Systems (ICIIS) 2015
DOI: 10.1109/iciinfs.2015.7399053
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Effect of semiconductor devices' output parasitic capacitance on zero-current clamping phenomenon in PWM-VSI drives

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Cited by 4 publications
(5 citation statements)
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“…When n is increased, the losses approach (39) with X(x), which validates the implementation. Results simulated with the axisymmetric FE model under similar conditions are also shown, and correspond well to the ones predicted by (39) with X(x).…”
Section: B Analytical Validationsupporting
confidence: 72%
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“…When n is increased, the losses approach (39) with X(x), which validates the implementation. Results simulated with the axisymmetric FE model under similar conditions are also shown, and correspond well to the ones predicted by (39) with X(x).…”
Section: B Analytical Validationsupporting
confidence: 72%
“…The ZCC and the flux-density deformation were not observed during the measurements, and the dc link voltage remained close to 15 V at all switching frequencies. This might be due to the parasitic capacitances, which were not accounted for in the simulations, but which may affect the behavior of the system during the deadtime, as discussed in [39]. This is also suggested by the Fig.…”
Section: Comparison To Measurementsmentioning
confidence: 86%
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